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HIP6004
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FileNumber4275.2

HIP6004

BuckandSynchronous-Rectifier(PWM)

ControllerandOutputVoltageMonitor

TheHIP6004providescompletecontrolandprotectionfora

DC-DCconverteroptimizedforhigh-performance

microprocessorapplications.Itisdesignedtodrivetwo

N-ChannelMOSFETsinasynchronous-rectifiedbuck

topology.TheHIP6004integratesallofthecontrol,output

adjustment,monitoringandprotectionfunctionsintoasingle

package.

Theoutputvoltageoftheconverteriseasilyadjustedand

preciselyregulated.TheHIP6004includesa5-input

digital-to-analogconverter(DAC)thatadjuststheoutput

voltagefrom2.1V

DC

to3.5V

DC

in0.1Vincrementsandfrom

1.3V

DC

to2.1V

DC

in0.05Vsteps.Theprecisionreference

andvoltage-moderegulatorholdtheselectedoutputvoltage

towithin±1%overtemperatureandlinevoltagevariations.

TheHIP6004providessimple,singlefeedbackloop,

voltage-modecontrolwithfasttransientresponse.Itincludes

a200kHzfree-runningtriangle-waveoscillatorthatis

adjustablefrombelow50kHztoover1MHz.Theerror

amplifierfeaturesa15MHzgain-bandwidthproductand

6V/μsslewratewhichenableshighconverterbandwidthfor

fasttransientperformance.TheresultingPWMdutyratio

rangesfrom0%to100%.

TheHIP6004monitorstheoutputvoltagewithawindow

comparatorthattrackstheDACoutputandissuesaPower

Goodsignalwhentheoutputiswithin±10%.TheHIP6004

protectsagainstover-currentconditionsbyinhibitingPWM

operation.Built-inover-voltageprotectiontriggersan

externalSCRtocrowbartheinputsupply.TheHIP6004

monitorsthecurrentbyusingther

DS(ON)

oftheupper

MOSFETwhicheliminatestheneedforacurrentsensing

resistor.

AlphaMicro?isatrademarkofDigitalComputerEquipmentCorporation.

Pentium?isaregisteredtrademarkofIntelCorporation.

PowerPC?isaregisteredtrademarkofIBM.

Features

?DrivesTwoN-ChannelMOSFETs

?Operatesfrom+5Vor+12VInput

?SimpleSingle-LoopControlDesign

-Voltage-ModePWMControl

?FastTransientResponse

-High-BandwidthErrorAmplifier

-Full0%to100%DutyRatio

?ExcellentOutputVoltageRegulation

-±1%OverLineVoltageandTemperature

?5-BitDigital-to-AnalogOutputVoltageSelection

-WideRange...................1.3V

DC

to3.5V

DC

-0.1VBinarySteps...............2.1V

DC

to3.5V

DC

-0.05VBinaryStep...............1.3V

DC

to2.1V

DC

?Power-GoodOutputVoltageMonitor

?Over-VoltageandOver-CurrentFaultMonitors

-DoesNotRequireExtraCurrentSensingElement,

UsesMOSFETsr

DS(ON)

?SmallConverterSize

-ConstantFrequencyOperation

-200kHzFree-RunningOscillatorProgrammablefrom

50kHztoover1MHz

Applications

?

PowerSupplyforPentium?,PentiumPro,PowerPC?and

Alpha?Microprocessors

?

High-Power5Vto3.xVDC-DCRegulators

?

Low-VoltageDistributedPowerSupplies

Pinout

HIP6004

(SOIC)

TOPVIEW

OrderingInformation

PARTNUMBER

TEMP.

RANGE(

o

C)PACKAGE

PKG.

NO.

HIP6004CB0to7020LdSOICM20.3

Thisdatasheetdescribesapre-releasedproduct.

11

12

13

14

15

16

17

18

20

19

10

9

8

7

6

5

4

3

2

1VSEN

OCSET

SS

VID0

VID1

VID2

VID4

VID3

COMP

FB

RT

VCC

LGATE

PGND

OVP

BOOT

UGATE

PHASE

PGOOD

GND

DataSheetMarch2000

CAUTION:Thesedevicesaresensitivetoelectrostaticdischarge;followproperICHandlingProcedures.

1-888-INTERSILor321-724-7143|Copyright?IntersilCorporation2000

2

TypicalApplication

BlockDiagram

+12V

+V

OUT

PGND

HIP6004

VSEN

RT

FB

COMP

VID0

VID1

VID2

VID3

SS

PGOOD

D/A

GND

OSC

LGATE

UGATE

OCSET

PHASE

BOOT

EN

VCC

V

IN

=+5Vor+12V

OVP

MONITORAND

PROTECTION

+

-

+

-VID4

D/A

CONVERTER

(DAC)

OSCILLATOR

SOFT-

START

REFERENCE

POWER-ON

RESET(POR)

115%

110%

90%

INHIBIT

PWM

COMPARATOR

ERROR

AMP

VCC

PGOOD

SS

PWM

OVP

RT

GND

VSEN

OCSET

VID0

VID1

VID2

VID3

FB

COMP

DACOUT

OVER-

VOLTAGE

OVER-

CURRENT

GATE

CONTROL

LOGIC

BOOT

UGATE

PHASE

200μA

10μA

4V

+

-

+

-

+

-

+

-

+

-

+

-

VID4

LGATE

PGND

HIP6004

3

AbsoluteMaximumRatingsThermalInformation

SupplyVoltage,V

CC

................................+15V

BootVoltage,V

BOOT

-V

PHASE

........................+15V

Input,OutputorI/OVoltage...........GND-0.3VtoVCC+0.3V

ESDClassification.................................Class2

OperatingConditions

SupplyVoltage,V

CC

...........................+12V±10%

AmbientTemperatureRange.....................0

o

Cto70

o

C

JunctionTemperatureRange....................0

o

Cto125

o

C

ThermalResistance(Typical,Note1)θ

JA

(

o

C/W)

SOICPackage.............................118

MaximumJunctionTemperature(PlasticPackage)........150

o

C

MaximumStorageTemperatureRange..........-65

o

Cto150

o

C

MaximumLeadTemperature(Soldering10s).............300

o

C

(SOIC-LeadTipsOnly)

CAUTION:Stressesabovethoselistedin“AbsoluteMaximumRatings”maycausepermanentdamagetothedevice.Thisisastressonlyratingandoperationofthe

deviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionsofthisspecificationisnotimplied.

NOTE:

1.θ

JA

ismeasuredwiththecomponentmountedonaloweffectivethermalconductivitytestboardinfreeair.SeeTechBrief379fordetails.

ElectricalSpecificationsRecommendedOperatingConditions,UnlessOtherwiseNoted

PARAMETERSYMBOLTESTCONDITIONSMINTYPMAXUNITS

VCCSUPPLYCURRENT

NominalSupplyI

CC

UGATEandLGATEOpen-5-mA

POWER-ONRESET

RisingVCCThresholdV

OCSET

=4.5V--10.4V

FallingVCCThresholdV

OCSET

=4.5V8.2--V

RisingV

OCSET

Threshold-1.26-V

OSCILLATOR

FreeRunningFrequencyRT=OPEN185200215kHz

TotalVariation6k?
RampAmplitude?V

OSC

RT=Open-1.9-V

P-P

REFERENCEANDDAC

DACOUTVoltageAccuracy-1.0-+1.0%

ERRORAMPLIFIER

DCGain-88-dB

Gain-BandwidthProductGBW-15-MHz

SlewRateSRCOMP=10pF-6-V/μs

GATEDRIVERS

UpperGateSourceI

UGATE

V

BOOT

-V

PHASE

=12V,V

UGATE

=6V350500-mA

UpperGateSinkR

UGATE

I

LGATE

=0.3A-5.510?

LowerGateSourceI

LGATE

VCC=12V,V

LGATE

=6V300450-mA

LowerGateSinkR

LGATE

I

LGATE

=0.3A-3.56.5?

PROTECTION

Over-VoltageTrip(V

SEN

/DACOUT)-115120%

OCSETCurrentSourceI

OCSET

V

OCSET

=4.5V

DC

170200230μA

OVPSourcingCurrentI

OVP

V

SEN

=5.5V,V

OVP

=0V60--mA

SoftStartCurrentI

SS

-10-μA

POWERGOOD

UpperThreshold(V

SEN

/DACOUT)VSENRising106-111%

LowerThreshold(V

SEN

/DACOUT)VSENFalling89-94%

Hysteresis(VSEN/DACOUT)UpperandLowerThreshold-2-%

PGOODVoltageLowV

PGOOD

I

PGOOD

=-5mA-0.5-V

HIP6004

4

FunctionalPinDescription

VSEN(Pin1)

Thispinisconnectedtotheconvertersoutputvoltage.The

PGOODandOVPcomparatorcircuitsusethissignalto

reportoutputvoltagestatusandforovervoltageprotection.

OCSET(Pin2)

Connectaresistor(R

OCSET

)fromthispintothedrainofthe

upperMOSFET.R

OCSET

,aninternal200μAcurrentsource

(I

OCS

),andtheupperMOSFETon-resistance(r

DS(ON)

)set

theconverterover-current(OC)trippointaccordingtothe

followingequation:

Anover-currenttripcyclesthesoft-startfunction.

SS(Pin3)

Connectacapacitorfromthispintoground.Thiscapacitor,

alongwithaninternal10μAcurrentsource,setsthesoft-

startintervaloftheconverter.

VID0-4(Pins4-8)

VID0-4aretheinputpinstothe5-bitDAC.Thestatesof

thesefivepinsprogramtheinternalvoltagereference

(DACOUT).ThelevelofDACOUTsetstheconverteroutput

voltage.ItalsosetsthePGOODandOVPthresholds.Table

1specifiesDACOUTforthe32combinationsofDACinputs.

COMP(Pin9)andFB(Pin10)

COMPandFBaretheavailableexternalpinsoftheerror

amplifier.TheFBpinistheinvertinginputoftheerror

amplifierandtheCOMPpinistheerroramplifieroutput.

Thesepinsareusedtocompensatethevoltage-control

feedbackloopoftheconverter.

GND(Pin11)

SignalgroundfortheIC.Allvoltagelevelsaremeasuredwith

respecttothispin.

PGOOD(Pin12)

PGOODisanopencollectoroutputusedtoindicatethe

statusoftheconverteroutputvoltage.Thispinispulledlow

whentheconverteroutputisnotwithin±10%ofthe

DACOUTreferencevoltage.

PHASE(Pin13)

ConnectthePHASEpintotheupperMOSFETsource.This

pinisusedtomonitorthevoltagedropacrosstheMOSFET

forover-currentprotection.Thispinalsoprovidesthereturn

pathfortheuppergatedrive.

UGATE(Pin14)

ConnectUGATEtotheupperMOSFETgate.Thispin

providesthegatedrivefortheupperMOSFET.

BOOT(Pin15)

ThispinprovidesbiasvoltagetotheupperMOSFETdriver.

AbootstrapcircuitmaybeusedtocreateaBOOTvoltage

suitabletodriveastandardN-ChannelMOSFET.

TypicalPerformanceCurves

FIGURE1.R

T

RESISTANCEvsFREQUENCYFIGURE2.BIASSUPPLYCURRENTvsFREQUENCY

101001000

SWITCHINGFREQUENCY(kHz)

RESIST

ANCE(k

?

)

10

100

1000

R

T

PULLUP

TO+12V

R

T

PULLDOWNTOV

SS

1002003004005006007008009001000

I

CC

(mA)

SWITCHINGFREQUENCY(kHz)

C

GATE

=3300pF

C

GATE

=1000pF

C

GATE

=10pF

C

UPPER

=C

LOWER

=C

GATE

80

70

60

50

40

30

20

10

0

11

12

13

14

15

16

17

18

20

19

10

9

8

7

6

5

4

3

2

1VSEN

OCSET

SS

VID0

VID1

VID2

VID4

VID3

COMP

FB

RT

VCC

LGATE

PGND

OVP

BOOT

UGATE

PHASE

PGOOD

GND

I

PEAK

I

OCS

R

OCSET

?

r

DSON()

--------------------------------------------=

HIP6004

5

PGND(Pin16)

Thisisthepowergroundconnection.TiethelowerMOSFET

sourcetothispin.

LGATE(Pin17)

ConnectLGATEtothelowerMOSFETgate.Thispin

providesthegatedriveforthelowerMOSFET.

VCC(Pin18)

Providea12Vbiassupplyforthechiptothispin.

OVP(Pin19)

TheOVPpincanbeusedtodriveanexternalSCRinthe

eventofanovervoltagecondition.

RT(Pin20)

Thispinprovidesoscillatorswitchingfrequencyadjustment.

Byplacingaresistor(R

T

)fromthispintoGND,thenominal

200kHzswitchingfrequencyisincreasedaccordingtothe

followingequation:

Conversely,connectingapull-upresistor(R

T

)fromthispin

toVCCreducestheswitchingfrequencyaccordingtothe

followingequation:

FunctionalDescription

Initialization

TheHIP6004automaticallyinitializesuponreceiptofpower.

Specialsequencingoftheinputsuppliesisnotnecessary.

ThePower-OnReset(POR)functioncontinuallymonitors

theinputsupplyvoltages.ThePORmonitorsthebias

voltageattheVCCpinandtheinputvoltage(V

IN

)onthe

OCSETpin.ThelevelonOCSETisequaltoV

IN

lessafixed

voltagedrop(seeover-currentprotection).ThePORfunction

initiatessoftstartoperationafterbothinputsupplyvoltages

exceedtheirPORthresholds.Foroperationwithasingle

+12Vpowersource,V

IN

andV

CC

areequivalentandthe

+12VpowersourcemustexceedtherisingV

CC

threshold

beforePORinitiatesoperation.

SoftStart

ThePORfunctioninitiatesthesoftstartsequence.Aninternal

10μAcurrentsourcechargesanexternalcapacitor(C

SS

)on

theSSpinto4V.Softstartclampstheerroramplifieroutput

(COMPpin)andreferenceinput(+terminaloferroramp)tothe

SSpinvoltage.Figure3showsthesoftstartintervalwith

C

SS

=0.1μF.Initiallytheclampontheerroramplifier(COMP

pin)controlstheconverter’soutputvoltage.Att

1

inFigure3,the

SSvoltagereachesthevalleyoftheoscillator’strianglewave.

Theoscillator’striangularwaveformiscomparedtotheramping

erroramplifiervoltage.ThisgeneratesPHASEpulsesof

increasingwidththatchargetheoutputcapacitor(s).This

intervalofincreasingpulsewidthcontinuestot

2

.Withsufficient

outputvoltage,theclamponthereferenceinputcontrolsthe

outputvoltage.Thisistheintervalbetweent

2

andt

3

inFigure3.

Att

3

theSSvoltageexceedstheDACOUTvoltageandthe

outputvoltageisinregulation.Thismethodprovidesarapid

andcontrolledoutputvoltagerise.ThePGOODsignaltoggles

‘high’whentheoutputvoltage(VSENpin)iswithin±5%of

DACOUT.The2%hysteresisbuiltintothepowergood

comparatorspreventsPGOODoscillationduetonominal

outputvoltageripple.

Over-CurrentProtection

Theover-currentfunctionprotectstheconverterfroma

shortedoutputbyusingtheupperMOSFETson-resistance,

r

DS(ON)

tomonitorthecurrent.Thismethodenhancesthe

converter’sefficiencyandreducescostbyeliminatinga

currentsensingresistor.

Theover-currentfunctioncyclesthesoft-startfunctionina

hiccupmodetoprovidefaultprotection.Aresistor(R

OCSET

)

programstheover-currenttriplevel.Aninternal200μAcurrent

sinkdevelopsavoltageacrossR

OCSET

thatisreferencedto

V

IN

.WhenthevoltageacrosstheupperMOSFET(also

Fs200kHz

510

6

?

R

T

k?()

---------------------+≈

(R

T

toGND)

Fs200kHz

410

7

?

R

T

k?()

---------------------–≈

(R

T

to12V)

0V

0V

0V

TIME(5ms/DIV.)

SOFT-START

(1V/DIV.)

OUTPUT

(1V/DIV.)

VOLTAGE

t

2

t

3

PGOOD

(2V/DIV.)

t

1

FIGURE3.SOFTSTARTINTERVAL

OUTPUTINDUCT

OR

SOFT

-ST

AR

T

0A

0V

TIME(20ms/DIV.)

5A

10A

15A

2V

4V

FIGURE4.OVER-CURRENTOPERATION

HIP6004

6

referencedtoV

IN

)exceedsthevoltageacrossR

OCSET

,the

over-currentfunctioninitiatesasoft-startsequence.Thesoft-

startfunctiondischargesC

SS

witha10μAcurrentsinkand

inhibitsPWMoperation.Thesoft-startfunctionrechargesC

SS

,

andPWMoperationresumeswiththeerroramplifierclamped

totheSSvoltage.Shouldanoverloadoccurwhilerecharging

C

SS

,thesoftstartfunctioninhibitsPWMoperationwhilefully

chargingC

SS

to4Vtocompleteitscycle.Figure4showsthis

operationwithanoverloadcondition.Notethattheinductor

currentincreasestoover15AduringtheC

SS

charginginterval

andcausesanover-currenttrip.Theconverterdissipatesvery

littlepowerwiththismethod.Themeasuredinputpowerforthe

conditionsofFigure4is2.5W.

Theover-currentfunctionwilltripatapeakinductorcurrent

(I

PEAK)

determinedby:

whereI

OCSET

istheinternalOCSETcurrentsource(200μA

typical).TheOCtrippointvariesmainlyduetotheMOSFETs

r

DS(ON)

variations.Toavoidover-currenttrippinginthe

normaloperatingloadrange,findtheR

OCSET

resistorfrom

theequationabovewith:

1.Themaximumr

DS(ON)

atthehighestjunctiontemperature.

2.TheminimumI

OCSET

fromthespecificationtable.

3.DetermineI

PEAK

for,

where?Iistheoutputinductorripplecurrent.

Foranequationfortheripplecurrentseethesectionunder

componentguidelinestitled‘OutputInductorSelection’.

Asmallceramiccapacitorshouldbeplacedinparallelwith

R

OCSET

tosmooththevoltageacrossR

OCSET

inthe

presenceofswitchingnoiseontheinputvoltage.

OutputVoltageProgram

TheoutputvoltageofaHIP6004converterisprogrammed

todiscretelevelsbetween1.3V

DC

and3.5V

DC

.The

voltageidentification(VID)pinsprogramaninternalvoltage

reference(DACOUT)witha5-bitdigital-to-analogconverter

(DAC).ThelevelofDACOUTalsosetsthePGOODand

OVPthresholds.Table1specifiestheDACOUTvoltagefor

the32combinationsofopenorshortconnectionsonthe

VIDpins.Theoutputvoltageshouldnotbeadjustedwhile

theconverterisdeliveringpower.Removeinputpower

beforechangingtheoutputvoltage.Adjustingtheoutput

voltageduringoperationcouldtogglethePGOODsignal

andexercisetheovervoltageprotection.

TheDACfunctionisaprecisionnon-invertingsummation

amplifiershowninFigure5.Theresistorvaluesshownare

onlyapproximationsoftheactualprecisionvaluesused.

GroundinganycombinationoftheVIDpinsincreasesthe

DACOUTvoltage.The‘open’circuitvoltageontheVIDpins

isthebandgapreferencevoltage,1.26V.

I

PEAK

I

OCSET

R

OCSET

?

r

DSON()

---------------------------------------------------=

I

PEAK

I

OUTMAX()

?I()2?+>

TABLE1.OUTPUTVOLTAGEPROGRAM

PINNAMENOMINAL

OUTPUT

VOLTAGE

DACOUT

PINNAMENOMINAL

OUTPUT

VOLTAGE

DACOUTVID4VID3VID2VID1VID0VID4VID3VID2VID1VID0

011111.30111112.0

011101.35111102.1

011011.40111012.

011001.45111002.3

010111.50110112.4

010101.55110102.5

010011.60110012.6

010001.65110002.7

001111.70101112.8

001101.75101102.9

001011.80101013.0

001001.85101003.1

000111.90100113.2

000101.95100103.

000012.00100013.4

000002.05100003.5

NOTE:0=connectedtoGNDorV

SS

,1=OPEN.

HIP6004

7

ApplicationGuidelines

LayoutConsiderations

Asinanyhighfrequencyswitchingconverter,layoutisvery

important.Switchingcurrentfromonepowerdevicetoanother

cangeneratevoltagetransientsacrosstheimpedancesofthe

interconnectingbondwiresandcircuittraces.These

interconnectingimpedancesshouldbeminimizedbyusing

wide,shortprintedcircuittraces.Thecriticalcomponents

shouldbelocatedasclosetogetheraspossible,usingground

planeconstructionorsinglepointgrounding.

Figure6showsthecriticalpowercomponentsofthe

converter.Tominimizethevoltageovershootthe

interconnectingwiresindicatedbyheavylinesshouldbe

partofgroundorpowerplaneinaprintedcircuitboard.The

componentsshowninFigure6shouldbelocatedasclose

togetheraspossible.PleasenotethatthecapacitorsC

IN

andC

O

eachrepresentnumerousphysicalcapacitors.

LocatetheHIP6004within3inchesoftheMOSFETs,Q1

andQ2.ThecircuittracesfortheMOSFETs’gateand

sourceconnectionsfromtheHIP6004mustbesizedto

handleupto1Apeakcurrent.

Figure7showsthecircuittracesthatrequireadditional

layoutconsideration.Usesinglepointandgroundplane

constructionforthecircuitsshown.Minimizeanyleakage

currentpathsontheSSPINandlocatethecapacitor,C

ss

closetotheSSpinbecausetheinternalcurrentsourceis

only10μA.ProvidelocalV

CC

decouplingbetweenVCCand

GNDpins.Locatethecapacitor,C

BOOT

ascloseaspractical

totheBOOTandPHASEpins.

FeedbackCompensation

Figure8highlightsthevoltage-modecontrolloopfora

synchronous-rectifiedbuckconverter.Theoutputvoltage

(V

OUT

)isregulatedtotheReferencevoltagelevel.Theerror

amplifier(ErrorAmp)output(V

E/A

)iscomparedwiththe

oscillator(OSC)triangularwavetoprovideapulse-width

modulated(PWM)wavewithanamplitudeofV

IN

atthe

PHASEnode.ThePWMwaveissmoothedbytheoutput

filter(L

O

andC

O

).

1.26V

VID3

VID2

VID1

VID0

COMP

DACOUT

ERROR

AMPLIFIER

2.7k?

1.7k?

5.4k?

10.7k?

21.5k?

2.9k?

DAC

VID4

3.6k?

12k?

12k?

BANDGAP

REFERENCE

+

-

FB

+

-

FIGURE5.DACFUNCTIONSCHEMATIC

PGND

L

O

C

OLGATE

UGATE

PHASE

Q1

Q2

D2

V

IN

V

OUT

RETURN

HIP6004

C

IN

LO

AD

FIGURE6.PRINTEDCIRCUITBOARDPOWERAND

GROUNDPLANESORISLANDS

FIGURE7.PRINTEDCIRCUITBOARDSMALLSIGNAL

LAYOUTGUIDELINES

+12V

HIP6004

SS

GND

VCC

BOOT

D1

L

O

C

O

V

OUT

LO

AD

Q1

Q2

PHASE

+V

IN

C

BOOT

C

VCC

C

SS

FIGURE8.VOLTAGE-MODEBUCKCONVERTER

COMPENSATIONDESIGN

V

OUT

OSC

REFERENCE

L

O

C

O

ESR

V

IN

?V

OSC

ERROR

AMP

PWM

DRIVER

(PARASITIC)

Z

FB

+

-

DACOUT

R1

R3R2

C3

C2

C1

COMP

V

OUT

FB

Z

FB

HIP6004

Z

IN

COMPARATOR

DRIVER

DETAILEDCOMPENSATIONCOMPONENTS

PHASE

V

E/A

+

-

+

-Z

IN

HIP6004

8

Themodulatortransferfunctionisthesmall-signaltransfer

functionofV

OUT

/V

E/A

.ThisfunctionisdominatedbyaDC

Gainandtheoutputfilter(L

O

andC

O

),withadoublepole

breakfrequencyatF

LC

andazeroatF

ESR

.TheDCGainof

themodulatorissimplytheinputvoltage(V

IN

)dividedbythe

peak-to-peakoscillatorvoltage?V

OSC

.

ModulatorBreakFrequencyEquations

Thecompensationnetworkconsistsoftheerroramplifier

(internaltotheHIP6004)andtheimpedancenetworksZ

IN

andZ

FB

.Thegoalofthecompensationnetworkistoprovide

aclosedlooptransferfunctionwiththehighest0dBcrossing

frequency(f

0dB

)andadequatephasemargin.Phasemargin

isthedifferencebetweentheclosedloopphaseatf

0dB

and

180degrees.Theequationsbelowrelatethecompensation

network’spoles,zerosandgaintothecomponents(R1,R2,

R3,C1,C2,andC3)inFigure8.Usetheseguidelinesfor

locatingthepolesandzerosofthecompensationnetwork:

1.PickGain(R2/R1)fordesiredconverterbandwidth

2.Place1

ST

ZeroBelowFilter’sDoublePole(~75%F

LC

)

3.Place2

ND

ZeroatFilter’sDoublePole

4.Place1

ST

PoleattheESRZero

5.Place2

ND

PoleatHalftheSwitchingFrequency

6.CheckGainagainstErrorAmplifier’sOpen-LoopGain

7.EstimatePhaseMargin-RepeatifNecessary

CompensationBreakFrequencyEquations

Figure9showsanasymptoticplotoftheDC-DCconverter’s

gainvs.frequency.TheactualModulatorGainhasahighgain

peakduetothehighQfactoroftheoutputfilterandisnot

showninFigure9.Usingtheaboveguidelinesshouldgivea

CompensationGainsimilartothecurveplotted.Theopen

looperroramplifiergainboundsthecompensationgain.

CheckthecompensationgainatF

P2

withthecapabilitiesof

theerroramplifier.TheClosedLoopGainisconstructedon

thelog-loggraphofFigure9byaddingtheModulatorGain(in

dB)totheCompensationGain(indB).Thisisequivalentto

multiplyingthemodulatortransferfunctiontothe

compensationtransferfunctionandplottingthegain.

Thecompensationgainusesexternalimpedancenetworks

Z

FB

andZ

IN

toprovideastable,highbandwidth(BW)overall

loop.Astablecontrolloophasagaincrossingwith

-20dB/decadeslopeandaphasemargingreaterthan45

degrees.Includeworstcasecomponentvariationswhen

determiningphasemargin.

ComponentSelectionGuidelines

OutputCapacitorSelection

Anoutputcapacitorisrequiredtofiltertheoutputandsupply

theloadtransientcurrent.Thefilteringrequirementsarea

functionoftheswitchingfrequencyandtheripplecurrent.

Theloadtransientrequirementsareafunctionoftheslew

rate(di/dt)andthemagnitudeofthetransientloadcurrent.

Theserequirementsaregenerallymetwithamixof

capacitorsandcarefullayout.

Modernmicroprocessorsproducetransientloadratesabove

1A/ns.Highfrequencycapacitorsinitiallysupplythetransient

andslowthecurrentloadrateseenbythebulkcapacitors.

Thebulkfiltercapacitorvaluesaregenerallydeterminedby

theESR(effectiveseriesresistance)andvoltagerating

requirementsratherthanactualcapacitancerequirements.

Highfrequencydecouplingcapacitorsshouldbeplacedas

closetothepowerpinsoftheloadasphysicallypossible.Be

carefulnottoaddinductanceinthecircuitboardwiringthat

couldcanceltheusefulnessoftheselowinductance

components.Consultwiththemanufactureroftheloadon

specificdecouplingrequirements.Forexample,Intel

recommendsthatthehighfrequencydecouplingforthe

PentiumProbecomposedofatleastforty(40)1μFceramic

capacitorsinthe1206surface-mountpackage.

Useonlyspecializedlow-ESRcapacitorsintendedfor

switching-regulatorapplicationsforthebulkcapacitors.The

bulkcapacitor’sESRwilldeterminetheoutputripplevoltage

andtheinitialvoltagedropafterahighslew-ratetransient.An

aluminumelectrolyticcapacitor’sESRvalueisrelatedtothe

casesizewithlowerESRavailableinlargercasesizes.

However,theequivalentseriesinductance(ESL)ofthese

capacitorsincreaseswithcasesizeandcanreducethe

usefulnessofthecapacitortohighslew-ratetransientloading.

Unfortunately,ESLisnotaspecifiedparameter.Workwith

yourcapacitorsupplierandmeasurethecapacitor’s

impedancewithfrequencytoselectasuitablecomponent.In

F

LC

1

2πL

O

C

O

??

---------------------------------------=F

ESR

1

2πESRC

O

??

----------------------------------------=

F

Z1

1

2πR2?C1?

----------------------------------=

F

Z2

2πR1R3+()C3??=

F

P1

1

2πR

2

C1C2?

C1C2+

----------------------

??

??

??

------------------------------------------------------=

F

P2

1

2πR3?C3?

----------------------------------=

100

80

60

40

20

0

-20

-40

-60

F

P1

F

Z2

10M1M100K10K1K10010

OPENLOOP

ERRORAMPGAIN

F

Z1

F

P2

20LOG

F

LC

F

ESR

COMPENSATION

GAIN(dB)

FREQUENCY(Hz)

GAIN

20LOG

(V

IN

/?V

OSC

)

MODULATOR

GAIN

(R

2

/R

1

)

FIGURE9.ASYMPTOTICBODEPLOTOFCONVERTERGAIN

CLOSEDLOOP

GAIN

HIP6004

9

mostcases,multipleelectrolyticcapacitorsofsmallcasesize

performbetterthanasinglelargecasecapacitor.

OutputInductorSelection

Theoutputinductorisselectedtomeettheoutputvoltage

ripplerequirementsandminimizetheconverter’sresponse

timetotheloadtransient.Theinductorvaluedeterminesthe

converter’sripplecurrentandtheripplevoltageisafunction

oftheripplecurrent.Theripplevoltageandcurrentare

approximatedbythefollowingequations:

Increasingthevalueofinductancereducestheripplecurrent

andvoltage.However,thelargeinductancevaluesreduce

theconverter’sresponsetimetoaloadtransient.

Oneoftheparameterslimitingtheconverter’sresponsetoa

loadtransientisthetimerequiredtochangetheinductor

current.Givenasufficientlyfastcontrolloopdesign,the

HIP6004willprovideeither0%or100%dutycyclein

responsetoaloadtransient.Theresponsetimeisthetime

requiredtoslewtheinductorcurrentfromaninitialcurrent

valuetothetransientcurrentlevel.Duringthisintervalthe

differencebetweentheinductorcurrentandthetransient

currentlevelmustbesuppliedbytheoutputcapacitor.

Minimizingtheresponsetimecanminimizetheoutput

capacitancerequired.

Theresponsetimetoatransientisdifferentforthe

applicationofloadandtheremovalofload.Thefollowing

equationsgivetheapproximateresponsetimeintervalfor

applicationandremovalofatransientload:

where:I

TRAN

isthetransientloadcurrentstep,t

RISE

isthe

responsetimetotheapplicationofload,andt

FALL

isthe

responsetimetotheremovalofload.Witha+5Vinput

source,theworstcaseresponsetimecanbeeitheratthe

applicationorremovalofloadanddependentuponthe

DACOUTsetting.Besuretocheckbothoftheseequations

attheminimumandmaximumoutputlevelsfortheworst

caseresponsetime.Witha+12Vinput,andoutputvoltage

levelequaltoDACOUT,t

FALL

isthelongestresponsetime.

InputCapacitorSelection

Useamixofinputbypasscapacitorstocontrolthevoltage

overshootacrosstheMOSFETs.Usesmallceramic

capacitorsforhighfrequencydecouplingandbulkcapacitors

tosupplythecurrentneededeachtimeQ1turnson.Placethe

smallceramiccapacitorsphysicallyclosetotheMOSFETs

andbetweenthedrainofQ1andthesourceofQ2.

Theimportantparametersforthebulkinputcapacitorarethe

voltageratingandtheRMScurrentrating.Forreliable

operation,selectthebulkcapacitorwithvoltageandcurrent

ratingsabovethemaximuminputvoltageandlargestRMS

currentrequiredbythecircuit.Thecapacitorvoltagerating

shouldbeatleast1.25timesgreaterthanthemaximum

inputvoltageandavoltageratingof1.5timesisa

conservativeguideline.TheRMScurrentratingrequirement

fortheinputcapacitorofabuckregulatorisapproximately

1/2theDCloadcurrent.

Forathroughholedesign,severalelectrolyticcapacitors

(PanasonicHFQseriesorNichiconPLseriesorSanyo

MV-GXorequivalent)maybeneeded.Forsurfacemount

designs,solidtantalumcapacitorscanbeused,butcaution

mustbeexercisedwithregardtothecapacitorsurgecurrent

rating.Thesecapacitorsmustbecapableofhandlingthe

surge-currentatpower-up.TheTPSseriesavailablefrom

AVX,andthe593DseriesfromSpraguearebothsurge

currenttested.

MOSFETSelection/Considerations

TheHIP6004requires2N-ChannelpowerMOSFETs.

Theseshouldbeselectedbaseduponr

DS(ON)

,gatesupply

requirements,andthermalmanagementrequirements.

Inhigh-currentapplications,theMOSFETpowerdissipation,

packageselectionandheatsinkarethedominantdesign

factors.Thepowerdissipationincludestwolosscomponents;

conductionlossandswitchingloss.Theconductionlossesare

thelargestcomponentofpowerdissipationforboththeupper

andthelowerMOSFETs.Theselossesaredistributed

betweenthetwoMOSFETsaccordingtodutyfactor(seethe

equationsbelow).OnlytheupperMOSFEThasswitching

losses,sincetheSchottkyrectifierclampstheswitchingnode

beforethesynchronousrectifierturnson.Theseequations

assumelinearvoltage-currenttransitionsanddonot

adequatelymodelpowerlossduethereverse-recoveryofthe

lowerMOSFETsbodydiode.Thegate-chargelossesare

dissipatedbytheHIP6004anddon''theattheMOSFETs.

However,largegate-chargeincreasestheswitchinginterval,

t

SW

whichincreasestheupperMOSFETswitchinglosses.

EnsurethatbothMOSFETsarewithintheirmaximumjunction

temperatureathighambienttemperaturebycalculatingthe

temperatureriseaccordingtopackagethermal-resistance

specifications.Aseparateheatsinkmaybenecessary

dependinguponMOSFETpower,packagetype,ambient

temperatureandairflow.

Standard-gateMOSFETsarenormallyrecommendedfor

usewiththeHIP6004.However,logic-levelgateMOSFETs

canbeusedunderspecialcircumstances.Theinputvoltage,

uppergatedrivelevel,andtheMOSFETsabsolutegate-to-

sourcevoltageratingdeterminewhetherlogic-level

MOSFETsareappropriate.

?I=

V

IN

-V

OUT

FsxL

V

OUT

V

IN

?V

OUT

=?IxESR

?

t

RISE

=

LxI

TRAN

V

IN

-V

OUT

t

FALL

=

LxI

TRAN

V

OUT

P

UPPER

=Io

2

xr

DS(ON)

xD+

1

2

IoxV

IN

xt

SW

xF

S

P

LOWER

=Io

2

xr

DS(ON)

x(1-D)

Where:Disthedutycycle=V

OUT

/V

IN

,

t

SW

istheswitchinginterval,and

F

S

istheswitchingfrequency.

HIP6004

10

Figure10showstheuppergatedrive(BOOTpin)supplied

byabootstrapcircuitfromV

CC

.Thebootcapacitor,C

BOOT

developsafloatingsupplyvoltagereferencedtothePHASE

pin.ThissupplyisrefreshedeachcycletoavoltageofVCC

lessthebootdiodedrop(V

D

)whenthelowerMOSFET,Q2

turnson.Logic-levelMOSFETscanonlybeusedifthe

MOSFETsabsolutegate-to-sourcevoltageratingexceeds

themaximumvoltageappliedtoV

CC

.

Figure11showstheuppergatedrivesuppliedbyadirect

connectiontoV

CC

.Thisoptionshouldonlybeusedin

convertersystemswherethemaininputvoltageis+5V

DC

or

less.Thepeakuppergate-to-sourcevoltageisapproximately

V

CC

lesstheinputsupply.For+5Vmainpowerand+12VDC

forthebias,thegate-to-sourcevoltageofQ1is7V.Alogic-

levelMOSFETisagoodchoiceforQ1andalogic-level

MOSFETcanbeusedforQ2ifitsabsolutegate-to-source

voltageratingexceedsthemaximumvoltageappliedtoV

CC

.

SchottkySelection

RectifierD2isaclampthatcatchesthenegativeinductor

swingduringthedeadtimebetweenturningoffthelower

MOSFETandturningontheupperMOSFET.Thediodemust

beaSchottkytypetopreventthelossyparasiticMOSFET

bodydiodefromconducting.Itisacceptabletoomitthediode

andletthebodydiodeofthelowerMOSFETclampthe

negativeinductorswing,butefficiencywilldroponeortwo

percentasaresult.Thediode''sratedreversebreakdown

voltagemustbegreaterthanthemaximuminputvoltage.

+12V

PGND

HIP6004

GND

LGATE

UGATE

PHASE

BOOT

VCC

+5Vor+12V

NOTE:

NOTE:

V

G-S

≈V

CC

C

BOOT

D

BOOT

Q1

Q2

+

-

FIGURE10.UPPERGATEDRIVE-BOOTSTRAPOPTION

V

G-S

≈V

CC

-V

D

D2

+V

D

-

+12V

PGND

HIP6004

GND

LGATE

UGATE

PHASE

BOOT

V

CC

+5VORLESS

NOTE:

NOTE:

V

G-S

≈V

CC

Q1

Q2

+

-

IGURE11.UPPERGATEDRIVE-DIRECTV

CC

DRIVEOPTION

V

G-S

≈V

CC

-5V

D2

HIP6004

11

HIP6004DC-DCConverterApplicationCircuit

Figure12showsanapplicationcircuitofaDC-DCConverter

foranIntelPentiumPromicroprocessor.Detailed

informationonthecircuit,includingacompleteBill-of-

Materialsandcircuitboarddescription,canbefoundin

ApplicationNoteAN9672.IntersilAnswerFAX(321-724-

7800)doc.#99672.

+12V

+V

O

PGND

HIP6004

VSEN

RT

FB

COMP

VID0

VID1

VID2

VID3

OVP

SSPGOOD

D/A

GND

MONITOR

OSC

VCC

L1-1μH

C1

L2

C

O

0.1μF

2x1μF

0.1μF

0.1μF

2.2nF

8.2nF

20K

1.33K

3μH

5x1000μF

9x1000μF

0.1μF

LGATE

UGATE

OCSET

PHASE

BOOT

15

D1

Q1

Q2

2N6394

1K

1000pF

D2

F1

2K

V

IN

=

+5V

OR

+12V

1

2

3

4

5

6

7

9

10

11

12

13

14

15

16

17

19

20

18

AND

PROTECTION

+

-

+

-

ComponentSelectionNotes;

C

0

-9Each1000μF6.3WVDC,SanyoMV-GXorEquivalent

C1-5Each330μF25WVDC,SanyoMV-GXorEquivalent

L2-Core:MicrometalsT50-52B;EachWinding:10Turnsof16AWG

L1-Core:MicrometalsT50-52;Winding:5Turnsof18AWG

D1-1N4148orEquivalent

D2-3A,40VSchottky,MotorolaMBR340orEquivalent

Q1,Q2-IntersilMOSFET;RFP70N03

FIGURE12.PENTIUMPRODC-DCCONVERTER

8

VID4

HIP6004

12

AllIntersilsemiconductorproductsaremanufactured,assembledandtestedunderISO9000qualitysystemscertification.

Intersilsemiconductorproductsaresoldbydescriptiononly.IntersilCorporationreservestherighttomakechangesincircuitdesignand/orspecificationsatanytimewith-

outnotice.Accordingly,thereaderiscautionedtoverifythatdatasheetsarecurrentbeforeplacingorders.InformationfurnishedbyIntersilisbelievedtobeaccurateand

reliable.However,noresponsibilityisassumedbyIntersiloritssubsidiariesforitsuse;norforanyinfringementsofpatentsorotherrightsofthirdpartieswhichmayresult

fromitsuse.NolicenseisgrantedbyimplicationorotherwiseunderanypatentorpatentrightsofIntersiloritssubsidiaries.

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HIP6004

SmallOutlinePlasticPackages(SOIC)

NOTES:

1.Symbolsaredefinedinthe“MOSeriesSymbolList”inSection2.2of

PublicationNumber95.

2.DimensioningandtolerancingperANSIY14.5M-1982.

3.Dimension“D”doesnotincludemoldflash,protrusionsorgateburrs.

Moldflash,protrusionandgateburrsshallnotexceed0.15mm(0.006

inch)perside.

4.Dimension“E”doesnotincludeinterleadflashorprotrusions.Interlead

flashandprotrusionsshallnotexceed0.25mm(0.010inch)perside.

5.Thechamferonthebodyisoptional.Ifitisnotpresent,avisualindex

featuremustbelocatedwithinthecrosshatchedarea.

6.“L”isthelengthofterminalforsolderingtoasubstrate.

7.“N”isthenumberofterminalpositions.

8.Terminalnumbersareshownforreferenceonly.

9.Theleadwidth“B”,asmeasured0.36mm(0.014inch)orgreater

abovetheseatingplane,shallnotexceedamaximumvalueof

0.61mm(0.024inch)

10.Controllingdimension:MILLIMETER.Convertedinchdimensions

arenotnecessarilyexact.

INDEX

AREA

E

D

N

123

-B-

0.25(0.010)CAMBS

e

-A-

L

B

M

-C-

A1

A

SEATINGPLANE

0.10(0.004)

hx45

o

C

H

0.25(0.010)BMM

α

M20.3(JEDECMS-013-ACISSUEC)

20LEADWIDEBODYSMALLOUTLINEPLASTICPACKAGE

SYMBOL

INCHESMILLIMETERS

NOTESMINMAXMINMAX

A0.09260.10432.352.65-

A10.00400.01180.100.30-

B0.0130.02000.330.519

C0.00910.01250.230.32-

D0.49610.511812.6013.003

E0.29140.29927.407.604

e0.050BSC1.27BSC-

H0.3940.41910.0010.65-

h0.0100.0290.250.755

L0.0160.0500.401.276

N20207

α0

o

8

o

0

o

8

o

-

Rev.012/93

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