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Ubuntu 11.04 OpenJTag OpenOCD Mini6410 配置 Posted on August 24, 2011 0 参考：关于OpenOCD的安装配置（以mini2440＋OpenJTAG为例） http://blog./space.php?uid=20543672&do=blog&id=94365 tekkamanninja 1.安装libusb-dev： sudo apt-get install libusb-dev 2.下载最新版libftdi-0.19.tar.gz，这是OpenJTAG使用的FT2232D 芯片的底层驱动库。: ./configure; make; sudo make install; 3.下载OpenOCD新版本安装文件，http://developer./project/showfiles.php?group_id=4148&release_id=18726 ./configure --enable-maintainer-mode --enable-ft2232_libftdi make sudo make install 4.从OpenOCD的安装目录找到对应芯片机PCB板的配置文件，组合为openocd.cfg，放到用户根目录中。（文件在最后） 5. 如果运行openocd出现”unable to open ftdi device: device not found”或者“unable to get device description”之类的提示，就添加一个udev配置文件，/etc/udev/rules.d/45-ft2232.rules 内容如下： !="usb", ACTION!="add", SUBSYSTEM!=="usb_device", GOTO="kcontrol_rules_end"SYSFS{idProduct}=="5118", SYSFS{idVendor}=="1457", MODE="664", GROUP="plugdev" LABEL="kcontrol_rules_end" 6.OpenJTag + Mini6410/Tiny6410的配置文件: #————————————————————————- telnet_port 4444 tcl_port 6666 #------------------------------------------------------------------------- # GDB Setup #------------------------------------------------------------------------- gdb_port 3333 gdb_breakpoint_override hard gdb_memory_map enable gdb_flash_program enable # # Amontec JTAGkey # # http://www./jtagkey.shtml # interface ft2232 ft2232_vid_pid 0x1457 0x5118 ft2232_layout "jtagkey_prototype_v1" ft2232_device_desc "USB<=>JTAG&RS232" # -*- tcl -*- # Target configuration for the Samsung s3c6410 system on chip # Tested on a SMDK6410 # Processor : ARM1176 # Info: JTAG device found: 0x0032409d (Manufacturer: 0x04e, Part: 0x0324, Version: 0x0) # [Duane Ellis 27/nov/2008: Above 0x0032409d appears to be copy/paste from other places] # [and I do not believe it to be accurate, hence the 0xffffffff below] if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME s3c6410 } if { [info exists ENDIAN] } { set _ENDIAN $ENDIAN } else { # this defaults to a bigendian set _ENDIAN little } # trace buffer if { [info exists ETBTAPID ] } { set _ETBTAPID $ETBTAPID } else { # force an error till we get a good number set _ETBTAPID 0x2b900f0f } if { [info exists CPUTAPID ] } { set _CPUTAPID $CPUTAPID } else { # force an error till we get a good number set _CPUTAPID 0x07b76f0f } #jtag scan chain jtag newtap $_CHIPNAME etb -irlen 4 -expected-id $_ETBTAPID jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm1176 adapter_nsrst_delay 500 jtag_ntrst_delay 500 #reset configuration reset_config trst_and_srst # trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode etm config $_TARGETNAME 16 normal full etb etb config $_TARGETNAME $_CHIPNAME.etb # Target configuration for the Samsung s3c6410 system on chip # Tested on a tiny6410 # Processor : ARM1176 # Info : JTAG tap: s3c6410.etb tap/device found: 0x2b900f0f (mfg: 0x787, part: 0xb900, ver: 0x2) # Info : JTAG tap: s3c6410.cpu tap/device found: 0x07b76f0f (mfg: 0x787, part: 0x7b76, ver: 0x0) #source [find target/samsung_s3c6410.cfg] proc init_6410 {} { halt reg cpsr 0x1D3 arm mcr 15 0 15 2 4 0x70000013 #----------------------------------------------- # Clock and Timer Setting #----------------------------------------------- mww 0x7e004000 0 ;# WATCHDOG - Disable mww 0x7E00F120 0x0003 ;# MEM_SYS_CFG - CS0:8 bit, Mem1:32bit, CS2=NAND #mww 0x7E00F120 0x1000 ;# MEM_SYS_CFG - CS0:16bit, Mem1:32bit, CS2=SROMC #mww 0x7E00F120 0x1002 ;# MEM_SYS_CFG - CS0:16bit, Mem1:32bit, CS2=OND mww 0x7E00F900 0x805e ;# OTHERS - Change SYNCMUX[6] to “1” sleep 1000 mww 0x7E00F900 0x80de ;# OTHERS - Assert SYNCREQ&VICSYNCEN to “1”(rb1004modify) sleep 1000 ;# - Others[11:8] to 0xF mww 0x7E00F000 0xffff ;# APLL_LOCK - APLL LockTime mww 0x7E00F004 0xffff ;# MPLL_LOCK - MPLL LockTime #mww 0x7E00F020 0x1047310 ;# CLK_DIV0 - ARMCLK:HCLK:PCLK = 1:4:16 mww 0x7E00F020 0x1043310 ;# CLK_DIV0 - ARMCLK:HCLK:PCLK = 1:4:8 #mww 0x7E00F00c 0x81900302 ;# APLL_CON - A:400, P:3, S:2 => 400MHz #mww 0x7E00F010 0x81900303 ;# MPLL_CON - M:400, P:3, S:3 => 200MHz #mww 0x7E00F00c 0xc10A0301 ;# APLL_CON - A:266, P:3, S:1 => 533MHz #mww 0x7E00F010 0xc10A0301 ;# MPLL_CON - M:266, P:3, S:1 => 533MHz mww 0x7E00F01c 0x3 ;# CLK_SRC - APLL,MPLL Clock Select echo "Finished Clock setting" #----------------------------------------------- # DRAM initialization #----------------------------------------------- mww 0x7e001004 0x4 ;# P1MEMCCMD - Enter the config state mww 0x7e001010 0x30C ;# P1REFRESH - Refresh Period register (7800ns), 100MHz # mww 0x7e001010 0x40e ;# P1REFRESH - Refresh Period register (7800ns), 133MHz mww 0x7e001014 0x6 ;# P1CASLAT - CAS Latency = 3 mww 0x7e001018 0x1 ;# P1T_DQSS mww 0x7e00101c 0x2 ;# P1T_MRD mww 0x7e001020 0x7 ;# P1T_RAS - 45 ns mww 0x7e001024 0xA ;# P1T_RC - 67.5 ns mww 0x7e001028 0xC ;# P1T_RCD - 22.5 ns mww 0x7e00102C 0x10B ;# P1T_RFC - 80 ns mww 0x7e001030 0xC ;# P1T_RP - 22.5 ns mww 0x7e001034 0x3 ;# P1T_RRD - 15 ns mww 0x7e001038 0x3 ;# P1T_WR - 15 ns mww 0x7e00103C 0x2 ;# P1T_WTR mww 0x7e001040 0x2 ;# P1T_XP mww 0x7e001044 0x11 ;# P1T_XSR - 120 ns mww 0x7e001048 0x11 ;# P1T_ESR #----------------------------------------------- # Memory Configuration Registers #----------------------------------------------- mww 0x7e00100C 0x00010012 ;# P1MEMCFG - 1 CKE, 1Chip, 4burst, Alw, AP[10],ROW/Column bit mww 0x7e00104C 0x0B41 ;# P1MEMCFG2 - Read delay 1 Cycle, mDDR, 32bit, Sync. mww 0x7e001200 0x150F0 ;# CHIP_N_CFG - 0x150F0 for 256M, 0x150F8 for 128M #----------------------------------------------- # Memory Direct Commands #----------------------------------------------- mww 0x7e001008 0xc0000 ;# Chip0 Direct Command :NOP5 mww 0x7e001008 0x0 ;# Chip0 Direct Command :P reCharge al mww 0x7e001008 0x40000 ;# Chip0 Direct Command :AutoRefresh mww 0x7e001008 0x40000 ;# Chip0 Direct Command :AutoRefresh mww 0x7e001008 0xA0000 ;# EMRS, DS:Full, PASR:Full mww 0x7e001008 0x80032 ;# MRS, CAS3, BL4 mww 0x7e001004 0x0 ;# Enable DMC1 } proc install_6410_uboot {} { # write U-boot magic number mww 0x50000000 0x24564236 mww 0x50000004 0x20764316 load_image u-boot_nand-ram256.bin 0x50008000 bin load_image u-boot_nand-ram256.bin 0x57E00000 bin #Kick in reg pc 0x57E00000 resume } proc init_6410_flash {} { halt nand probe 0 nand list } adapter_khz 1000 adapter_nsrst_delay 100 jtag_ntrst_delay 100 reset_config trst_and_srst gdb_breakpoint_override hard targets nand device $_CHIPNAME.flash s3c6400 $_CHIPNAME.cpu init echo " " echo " " echo "-------------------------------------------------------------------" echo "---- The following mini6410/tiny6410 functions are available: ----" echo "---- init_6410 - initialize clock, timer, DRAM ----" echo "---- init_6410_flash - initializes NAND flash support ----" echo "---- install_6410_uboot - copies u-boot image into RAM and ----" echo "---- runs it ----" echo "-------------------------------------------------------------------" echo " " echo " " init_6410 |
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