CPU Clock Pulses and Clock Frequency

msp430 instruction timing

CPU Clock Pulses and Clock Frequency The CPU is a finite state machine whose transitions are triggered by a circuit called and oscillator that periodically generates "clock pulses."  One pulse duration is commonly called a "clock cycle" or "clock period."  We will use these terms interchangeably.   The frequency (rate) that clock pulses are generated is measured in "Hertz" (abbreviated Hz).  The units are in pulses/second, so the delay between pulses is the reciprocal of frequency. Typical clock frequencies range from just under one million to a bit more than two billion pulses per second (1 MHz to 2 GHz).   The MSP-430 is a family of specialized processors designed to control small energy-constrained devices (e.g blood pressure monitors).  Their clocks can be configured by software to generate pulses at a variety of clock frequencies ranging from just under 1MHz to between 16 and 32MHz (varies by model).  We examine how clock frequency is controlled in another chapter. Number of Clock Cycles Per Instruction The execution of an instruction includes several memory operations and not all instructions execute the same number of memory operations.  Furthermore internal processing of some instructions requires more clock cycles than others.  On the MSP430, each memory operation requires one clock cycle. Thus, you should not be surprised that the the execution time (in cycles) of an instruction varies by instruction. Each word of an instruction including its extension words must be "fetched" from memory.   Each of these memory reads requires one clock cycle. In preparation for the next cycle, the program counter is incremented by 2 during each of these memory reads. The instruction needs to be decoded (to determine its meaning) On the MSP430, this is done at the end of the same clock cycle as the instruction is fetched. Any input operands stored in memory must also be fetched.  Each of these memory reads requires one clock cycle. On the MSP430, input operands already in the CPU are available immediately. Internal processig of the operation is performed.   The MSP430 has a very simple (and therefore fast) MMU that can compute results within the same clock cycle that all input operands are within the CPU. Exceptions:  any operation that changes the PC such as a jmp, subroutine call, stack operation, or pop to the PC requires one extra execution cycle.  Push operations require one extra execution cycle. A call instruction includes a push operation and also changes the PC.  It therefore has both exception properties and requires two extra execution cycle. If the destination of a CMP instruction is in memory (see details below in bold).  The results are stored  If the destination operand is in memory, this requires one more clock cycle. Even for CMP instructions, which don't actually store their results.  This may be a hint as to how CMP is implemented. No clock cycles are required to store destination operands within registers. More details: see section 3.4.4 "Instruction Cycles and Lengths" of the MSP430x2xx Family User's Guide  instruction  # cycles  instruction fetch  # cycles operand fetch  # cycles result store  # additional execution cycles to perform internal processing *  # cycles total  add r5,r6     1     0  0  0  1  add &0x280,r6  2     1  0            0    3  add #100, r6  2  0  0  0  2  add r5, 0x282  2  1  1  0  4  add 0x280, 0x282  3  2  1  0  6     cmp r0x280, r6  2  1  0  0  3  cmp 0x280, 0x282  3  2  1*  0  6  jmp foo  1  0  0  1*  2  mov r5,pc  1  0  0  1*  2  pop pc  1  1  0  1*  3  pop r5      1  1  0  0  2  push r5  1  0  1  1*  3   push #0xdead  2  0  1  1*      4  call #0xdead  2  0  1  2*  5 *see notes above on exceptions. Example problem:  Q: How long does the following delay method execute on a MSP430 with a 2MHz clock:   delay: mov 1000, r15     again: sub #1, r15         jnz again         ret   Solution: 1. 1 clock cycle is 1/2000000s = 5x10-7s  = 0.5us 2. cycles/instruction   delay: mov 1000, r15 ; 2 cycles outside loop  again: sub #1, r15   ; 2 cycles inside loop (#1 in extension word)         jnz again     ; 2 cycles inside loop         ret           ; 3 cycles outside loop 3. cycles / execution of the routine  cycles per iteration  # times executed  total  inside loop  4  1000  4000  outside loop  5  1  5 Total execution time (accurate to three decimal places): 4.005x103 cycles * 5*10-7 s/cycle = 20*10-4s = 2*10-3s = 2ms