选择DC/DC转换器的最佳开关频率

Direct current-to-direct current (DC/DC) converters with faster switching frequencies are becoming popular due to their ability to decrease the size of the output capacitor and inductor to save board space. On the other hand, the demands from the point-of-load (POL) power supply increase as processor core voltage drops below 1V, making lower voltages difficult to achieve at faster frequencies due to the lower duty cycle.

Many power IC suppliers are aggressively marketing faster DC/DC converters that claim to save space. A DC/DC converter switching at 1 or 2 MHz sounds like a great idea, but there is more to understand about the impact to the power supply system than size and efficiency. Several design examples will be shown revealing the benefits and obstacles when switching at faster frequencies.

 

Selecting an Application
Three different power supplies were designed and built to show the trade offs of high switching frequency. For all three designs, the input voltage is 5V, the output voltage is 1.8V, and the output current is 3A. These requirements are typical for powering a performance processor such as a DSP, ASIC or FPGA. To bound the filter design and performance expectations, the allowable ripple voltage is 20 mV, which is about one percent of the output voltage, and the peak-to-peak inductor current is chosen at 1A.

 

Independent designs at frequencies of 350, 700, and 1600 kHz will be compared to illustrate the benefits and obstacles. The TPS54317, a 1.6 MHz, low-voltage, 3 A synchronous-buck DC/DC converter with integrated MOSFETs was chosen as the regulator in each example. The TPS54317 from Texas Instruments features a programmable frequency, external compensation and is intended for high-density processor power point-of-load applications.

 

Selecting the Inductor and Capacitor
The inductors and capacitors are chosen according to the following simplified formulas:

Equation 1:
V = L x di/dt
Rearranging: L ≥ Vout x (1-D)/(ΔI x Fs)
where: ΔI = 1 A peak-to-peak; D = 1.8 V/5 V="0".36

 

Equation 2:
I = C x dv/dt
Rearranging: C ≥ 2 x ΔI/(8 x Fs x ΔV)
where: ΔV = 20 mV, I = 1 A peak-to-peak

 

Equation 2 assumes a capacitor is used that has negligible series resistance, which is true for ceramic capacitors. Ceramic capacitors were chosen for all three designs because of their low resistance and small size. The multiplier of two shown above in the rearranged Equation 2 accounts for capacitance drop associated with DC bias, since this effect is not accounted for in the datasheets of most ceramic capacitors.

The circuit in Figure 1 was used to evaluate the performance of each design on the bench.

 

 

Figure 1: TPS54317 Reference Schematic.

 

The components in the schematic that do not have values are the components that were modified in each design. The output filter consists of L1 and C2. The values of these components for all three designs are listed in Table 1, and were chosen based on the results from the equations above.

Table 1: Capacitor and inductor selections at 350kHz, 700kHz, and 1600 kHz.

 

Note that the DC resistance of each inductor decreased as the frequency increased. This is due to less copper length needed for fewer turns. The error amplifier compensation components were designed independently for each switching frequency. The calculations for selecting the compensation values are beyond the scope of this article.

 

Minimum on-time
Digital converters-to-digital converter integrated circuits (IC) are characterized with a limit on the minimum controllable on-time, which is the narrowest achievable pulse width of the pulse width modulation (PWM) circuit. In a buck converter, the percentage of time that the field effect transistor (FET) is on during a switching cycle is called the duty cycle, and is equal to the ratio of the output voltage to input voltage.

 

For the converter example above, the duty cycle is 0.36 (1.8V/5.0V) and the minimum on-time of the TPS54317 is 150ns (max) as shown in the datasheet. The limit for the controllable pulse width results in a minimum achievable duty cycle, which can be easily calculated as shown in Equation 3. Once the minimum duty cycle is known, the lowest achievable output voltage can be calculated, as shown in Equation 4 and Table 2. The lowest output voltage is also limited by the reference voltage of the converter, which is 0.9V for the TPS54317.

 

Equation 3:
Minimum duty cycle =
Minimum on-time x Switching frequency

 

Equation 4:
Minimum Vout =
Vin x Minimum duty cycle (bounded by TPS54317 Vref)

 
 Table 2: Minimum output voltage with 150 ns minimum on-time.

 

In this example, a 1.8V output（a 1.2V output） can be generated with a 1.6 MHz switching frequency. However, if the frequency is 3MHz, the lowest possible output voltage is limited to 2.3 V and the DC/DC converter will skip pulses. The alternative is to lower the input voltage or reduce the frequency. It is a good idea to check the DC/DC converter datasheet for a guaranteed minimum controllable on-time before selecting a switching frequency.

 

Pulse Skipping
Pulse skipping occurs when the DC/DC converter cannot extinguish the gate drive pulses fast enough to maintain the desired duty cycle. The power supply will try to regulate the output voltage, but the ripple voltage will increase due to the pulses being further apart. Due to the pulse skipping, the output ripple will exhibit sub-harmonic components, which may present noise issues. It is also possible that the current limit circuit will no longer work properly since the IC may not respond to a large current spike. In some cases, the control loop may be unstable since the controller is not performing properly. The minimum controllable on-time is an important attribute and it is wise to check the DC/DC converter’s specification in the datasheet to verify a frequency and minimum on-time combination.

 

Efficiency and Power Dissipation
The efficiency of a DC/DC converter is one of the most important attributes to consider when designing a power supply. Poor efficiency translates into higher power dissipation which has to be managed on the circuit board with heat sinks or additional copper on the printed circuit board. Power dissipation also places a higher demand on the power supply upstream. Power dissipation has several components shown below:

The loss components of interest from our three examples come from the FET driving loss, the FET switching loss and the inductor loss. The FET resistance and IC loss are consistent since the same IC is used in all three designs. Since ceramic capacitors were chosen in each example, the capacitor loss is negligible due to their low equivalent series resistance. To show the effects of high frequency switching, the efficiency of each example was measured and illustrated in Figure 2.

 

 Figure 2: Efficiency at 5 V input and 1.8 V output at various frequencies.

 The figure clearly shows that the efficiency is decreased as switching frequency is increased. To improve efficiency at any frequency, look for a DC/DC converter with a low Rds (on), gate charge, or quiescent current specification at full load, or search for capacitors and inductors with lower equivalent resistance.

 

Size

Table 3 shows the inductor and capacitor values with the pad area required on the printed circuit board. 
 

Table 3: Component size and total area requirements

 

The recommended pad area of a capacitor or inductor is slightly larger than the individual component itself, and the pad area dimension is accounted for in each of the three design examples. Then, the total area was derived by adding the area occupied by each component, which includes the pad sizes for the IC, the filter and all other small resistors and capacitors multiplied by a factor of two to account for component spacing. The total area savings from 350 kHz to 1600 kHz is significant and provides a 50 percent reduction in filter size and a 35 percent reduction in board space, saving almost 100mm2.

 

However, the law of diminishing returns applies since the capacitance and inductance values cannot be reduced to nothing! In other words, pushing the frequency higher will not continually reduce the overall size since there is a limitation to appropriately sized mass produced inductors and capacitors.

 

Transient Response
The transient response is a good indicator of the performance level of a power supply. A Bode plot of each power supply was taken to show a comparison at higher switching frequencies. As shown in Figure 3, the phase margin of each power supply is between 45 and 55 degrees, indicating a well-dampened transient response.

 

 Figure 3: Bode plots at 350 kHz, 700 kHz, and 1600 kHz.

 

The cross over frequency is approximately one-eighth of the switching frequency. When using a fast switching DC/DC converter, make sure the power IC error amplifier has enough bandwidth to support a high crossover frequency. The TPS54317 error amplifier unity gain bandwidth is typically 5MHz. The actual transient response times are shown in Table 4 with the associated voltage peak overshoot value.

 
Table 4: Transient response.

 

The overshoot value is significantly lower with the higher switching frequency, due to the wider bandwidth. Lower transient voltage overshoots are desirable with newer performance processors as their regulation accuracy requirement may be three percent including transient voltage peaks.

When higher output currents are needed, Texas Instruments offers the TPS40140 stackable, dual-channel, 1 MHz DC/DC controller using external MOSFETs. The benefits of a fast switching frequency can be realized by interleaving a number of power stages and switching them out of phase.

 

For example, four outputs can be tied together switching at 500 kHz each, for an effective frequency of 2 MHz. The benefits are lower ripple, reduced input bulk capacitance, faster transient response, and better thermal management by spreading out the power dissipation over the circuit board. Up to eight TPS40140 devices can be connected and synchronized out of phase via digital bus for a maximum effective frequency of 16 MHz.

 

Summary
There are tradeoffs to designing high-frequency switching converters. Some of the advantages shown in this article are a smaller size, faster transient response and smaller voltage over and undershoots. On the other hand, the main penalty paid is a reduction of efficiency and increased heat dissipation.

 

There are potential pitfalls to pushing the envelope such as pulse skipping and noise issues. When selecting a DC/DC converter for high frequency applications, check the manufacturer’s datasheet for important specifications such as the minimum on-time, the gain-bandwidth of the error amplifier, the FET resistance and switching loss. Integrated circuits that perform well in these specifications will cost a premium, but will be worth the price and much easier to use when cornered with a tough design problem.

 

 

选择DC/DC 转换器最佳开关频率
作者: 德州仪器Richard Nowakowski 及Brian King

提高开关频率的好处很明显，但也有些缺点，设计人员应了解其中的得失利弊，才能选择最合适的开关频率来加以应用。这篇实用文章将逐一说明这些考虑因素。

开关频率很高的直流电源转换器(DC/DC) 正逐渐流行，因为它们可以藉由较小的输出电容和电感，进而节省电路板面积。但另一方面，负载点电源的需求量却随着处理器核心电压降到1V 以下而变得更严苛，这使得电源供应受到负载周期减少的影响，很难在频率更高的情形下达到所要求的更低电压。

许多电源组件供货商正在大力推销速度更快的直流电源转换器，并且宣称他们的产品可以节省空间。一个以1 或2MHz 速率切换的直流电源转换器听起来很棒，但设计人员除了关心体积与效率外，还应该了解其它会对电源供应系统带来冲击的因素。本文将提供几个设计范例，说明提高开关频率的各种优缺点。

选择应用
为了说明高开关频率的得失利弊，本文设计和实作了三种不同的电源供应，它们的输入电压都是5V，输出电压是1.8V，而输出电流则为3A，这些都是DSP、ASIC 或FPGA 等高效能处理器常见的电源要求。在滤波器设计和效能的限制下，这些设计最多允许20mV 涟波电压，大约等于输出电压的1%，峰对峰的电感电流则设为1A。

本文中将会比较350、700 和1600kHz 等不同频率的设计，藉以说明它们的优缺点。这些范例都以德州仪器(TI) 的TPS54317 做为稳压器，它是一款内建MOSFET 的1.6MHz、低电压、3A 同步直流降压转换器，具有可程序频率和外部补偿电路，专用于高密度处理器电源负载点应用。

选择电感与电容
电感与电容都是依据下列简单的公式来选择：

公式1：
V = L × di/dt
整理后可得：
L ≧ Vout × (1-D) / (Δ I × Fs)
其中Δ I = 1A 峰对峰值；D = 1.8V/5V = 0.36。

公式2：
I = C × dv/dt
整理后可得：
C ≧ 2 × Δ I / (8 × Fs × Δ V)
其中：Δ V = 20 mV﹐I = 1A 峰对峰值。

方程式2 假设电容的串联阻抗可忽略，如陶瓷电容，所以本文中的三个设计都选择使用阻抗和体积都很小的陶瓷电容。在重新整理后的公式2 中，乘数2 代表直流偏压造成的电容值下降，这是因为多数陶瓷电容的资料表都未将此效应列入考虑。

本文利用图1 中的电路评估三种设计分别的效能。

图1：TPS54317 参考电路图

图1 里有些组件未标示数值，那是因为这些组件在三种设计里的数值都不相同。输出滤波器由L1 和C2 组成，它们在三种设计里的数值分别如表1 所列，这些数值都是根据前面的公式计算而得。

表1：频率为350kHz、700kHz 和1600kHz 时所选择的电容值和电感值

注意频率越高，电感所需的圈数就越少，所以直流阻抗就越低。这些误差放大器的补偿零件都是针对本文中的三种开关频率所设计，但这里不会讨论如何计算及选择这些组件值。

最小导通时间
数字化直流电源转换器所能控制的最小导通时间，是由脉冲宽度调变(PWM) 电路所能产生的最小脉冲宽度决定。在降压转换器里，FET 导通时间在整个开关周期所占的比例称为负载周期(duty cycle)，它等于输出电压与输入电压的比值。

例如在图1 电路里，TPS54317 的负载周期从数据表可发现为0.36 (1.8V/5.0V)，最小导通时间则为150ns (最大值)。设计人员只要根据组件所能控制的最小脉冲宽度，就能利用公式3 轻易算出电路所能达到的最小负载周期，再利用公式4 计算转换器所能提供的最低输出电压(参考表2)。值得注意的是，转换器的最低输出电压也会受到参考电压的限制，例如TPS54317 的参考电压就是0.9V。

公式3
最小负载周期= 最小导通时间× 开关频率(3)
公式4
最小输出电压= 输入电压× 最小负载周期(不得低于TPS54317 的参考电压) (4)

表2：最小导通时间为150ns 时的最小输出电压

在此例中，1.6MHz 开关频率的最小输出电压限制为1.2V (译注：原文此处误为1.8V)。但若频率升至3MHz，最小输出电压限制就会增到2.3V。如果直流电源转换器要提供更低的输出电压，就必须省略部份脉冲、降低输入电压或减少开关频率。设计人员在选择直流电源转换器的开关频率前，最好先查询数据表，确保组件所能控制的最小导通时间符合设计要求。

省略脉冲
若转换器停止闸极驱动脉冲的速度不够快，无法达到所要求的负载周期，转换器便会省略部份脉冲(Pulse Skipping) 以提供所需的低输出电压。此时，尽管电源供应仍会努力保持输出电压稳定，但涟波电压仍会因为脉冲间隔变大而升高。由于省略脉冲的关系，输出涟波会出现某些次谐波成份，这可能会带来噪声的问题。限流电路也可能无法正常操作，因为组件或许不会对大电流突波做出响应。有时甚至控制器都不能正常工作，致使控制回路变得不稳定。最快可控制导通时间是直流电源转换器的一项重要参数，设计人员应检查组件数据表所列的规格，确保开关频率和最小导通时间都符合要求。

效率与功耗
直流电源转换器的效率是电源供应设计最重要的考虑因素之一。低效率等于高耗电，需要在电路板上安装散热片或扩大铜箔面积才能排除热量。另外，高耗电也会对上游电源造成很大的负担。功耗来源有下列几种：

影响因素 ·功耗来源
闸极电荷、驱动电压和频率的函数 ·FET 驱动功耗
输入电压、输出电流、FET ·FET 开关功耗 升起/下降时间以及频率的函数
I2 × 导通阻抗 ·FET 阻抗
I2 × 直流阻抗+ 交流核心功耗 ·电感功耗
IRMS2 ·电容功耗 × 等效串联组抗
查询数据表，找出组件操作时的Iq ·组件功耗(Iq)

在这三个例子里，主要功耗来源包括FET 驱动功耗、FET 开关功耗和电感功耗。FET 阻抗与组件功耗则没有区别，因为这三个设计使用同一个组件。电容功耗也可以忽略，因为它们都使用等效串联阻抗很小的陶瓷电容。为了展示高频开关的影响，图2 绘出了这些设计测量而得的效率值。

图2：不同频率下提供5V 输入和1.8V 输出时的效率

图2 清楚显示开关频率升高时，效率会下降。设计人员若要改善各种频率下的效率，就应选择低导通阻抗、低闸极电压和满负载时静态电流很小的直流电源转换器，或者使用等效阻抗更小的电感和电容。

组件尺寸
表3 是电感值和电容值以及它们在电路板上所需的焊盘面积(pad area)。

表3：组件尺寸和总面积需求

电容和电感的建议焊盘面积都略大于个别组件，但这点也已列入三个电路的设计考虑。接着只要将个别零件的使用面积加在一起(包括IC、滤波器和其它小型电阻及电容的焊盘面积)，然后乘以2 以便容纳组件间距，就能得到所需的总面积。从表2 可以看出当频率从350kHz 增加到1600kHz 时，滤波器大小会减少一半，电路板面积则缩小三成，因此所能节省的面积大约为100 平方毫米。

然而这种做法却有其限制，因为电感与电容不可能缩小为零，空间节省效率也要遵守报酬递减法则。换言之，由于大量生产的电感与电容都有尺寸限制，想藉由提高频率来缩小总面积的做法不可能无限延续下去。

瞬时响应
瞬时响应是很好的电源供应效能指标。本文绘出了三个电源供应的波德图(Bode Plot)，以便比较它们在较高频率时的效能。从图3 可看出这些电源供应的相位边限都在45 到55 度之间，显示它们都提供良好阻尼的瞬时响应。

图3：频率为350kHz、700kHz 和1600kHz 时的玻德图(Bode Plot)

交越频率(cross over frequency) 约为开关频率的1/8，故使用高开关频率的直流电源转换器时，应确认功率组件误差放大器的频宽足以支持高交越频率，例如TPS54317 的误差放大器增益频宽典型值就为5MHz。表4 是实际瞬时响应时间和相关的电压峰overshoot值。

表4：瞬时响应

从表4 中可看出开关频率越高的设计，其overshoot 值会大幅下降，原因是这些设计的频宽会变得更大。较小的瞬时电压overshoot 对新型高效能处理器比较有利，因为它们通常要求包含瞬时电压峰值在内的稳压精确度必须达到3%。

设计若需要更大的输出电流，TI 也提供可多相并联、双通道、1MHz 和使用外接MOSFET的直流电源转换控制器TPS40140。设计人员只要将多个功率级电路并联，再让它们以不同的相位操作，就能将高开关频率的优点带到应用设计。

举例来说，设计人员可将4 组500kHz 开关频率的输出接在一起，以便得到2MHz 的有效频率。这种做法的好处是能减少涟波、缩小输入电流容量、加快瞬时响应、和将功耗分散到整张电路板以提供更好的散热管理。设计人员最多能透过数字总线把8 个TPS40140组件连接在一起，并以不同的相位同步操作，使得有效频率高达16MHz。

结语
高开关频率的交换式电源转换器有利也有弊，本文提到的好处包括体积更小、瞬时响应更快以及电压overshoot 和undershoot 值都更小，主要缺点则是效率降低和热量增加。

提高开关频率还会带来一些潜在问题，例如省略脉冲(pulse skipping) 和噪声，因此在为高频应用选择直流电源转换器时，应先检查制造商的数据表以确认某些重要规格，例如最小导通时间、误差放大器增益频宽、FET 阻抗和开关功耗。在这些规格上表现良好的组件或许成本会很高，但它们却能带来更多的好处，遇到设计难题时也更容易使用。