android / kernel/omap / android-omap-steelhead-3.0-ics-aah / . / drivers / video / omap2 / hdcp / hd

1. /*
2. * hdcp.h
3. *
4. * HDCP interface DSS driver setting for TI's OMAP4 family of processor.
5. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www./
6. * Authors: Fabrice Olivero
7. * Fabrice Olivero <f-olivero@>
8. *
9. * This program is free software; you can redistribute it and/or modify it
10. * under the terms of the GNU General Public License version 2 as published by
11. * the Free Software Foundation.
12. *
13. * This program is distributed in the hope that it will be useful, but WITHOUT
14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16. * more details.
17. *
18. * You should have received a copy of the GNU General Public License along with
19. * this program. If not, see <http://www./licenses/>.
20. */
22. #ifndef _HDCP_H_
23. #define _HDCP_H_
26. /********************************/
27. /* Structures related to ioctl */
28. /********************************/
30. /* HDCP key size in 32-bit words */
31. #define DESHDCP_KEY_SIZE 160
33. /* HDCP ioctl */
34. #include <linux/ioctl.h>
35. #include <linux/types.h>
37. struct hdcp_encrypt_control {
38. uint32_t in_key[DESHDCP_KEY_SIZE];
39. uint32_t *out_key;
40. };
42. struct hdcp_enable_control {
43. uint32_t key[DESHDCP_KEY_SIZE];
44. int nb_retry;
45. };
47. #define MAX_SHA_DATA_SIZE 645
48. #define MAX_SHA_VPRIME_SIZE 20
50. struct hdcp_sha_in {
51. uint8_t data[MAX_SHA_DATA_SIZE];
52. uint32_t byte_counter;
53. uint8_t vprime[MAX_SHA_VPRIME_SIZE];
54. };
56. struct hdcp_wait_control {
57. uint32_t event;
58. struct hdcp_sha_in *data;
59. };
61. /* HDCP ioctl */
62. #define HDCP_IOCTL_MAGIC 'h'
63. #define HDCP_ENABLE _IOW(HDCP_IOCTL_MAGIC, 0, \
64. struct hdcp_enable_control)
65. #define HDCP_DISABLE _IO(HDCP_IOCTL_MAGIC, 1)
66. #define HDCP_ENCRYPT_KEY _IOWR(HDCP_IOCTL_MAGIC, 2, \
67. struct hdcp_encrypt_control)
68. #define HDCP_QUERY_STATUS _IOWR(HDCP_IOCTL_MAGIC, 3, uint32_t)
69. #define HDCP_WAIT_EVENT _IOWR(HDCP_IOCTL_MAGIC, 4, \
70. struct hdcp_wait_control)
71. #define HDCP_DONE _IOW(HDCP_IOCTL_MAGIC, 5, uint32_t)
73. /* HDCP state */
74. #define HDCP_STATE_DISABLED 0
75. #define HDCP_STATE_INIT 1
76. #define HDCP_STATE_AUTH_1ST_STEP 2
77. #define HDCP_STATE_AUTH_2ND_STEP 3
78. #define HDCP_STATE_AUTH_3RD_STEP 4
79. #define HDCP_STATE_AUTH_FAIL_RESTARTING 5
80. #define HDCP_STATE_AUTH_FAILURE 6
82. /* HDCP events */
83. #define HDCP_EVENT_STEP1 (1 << 0x0)
84. #define HDCP_EVENT_STEP2 (1 << 0x1)
85. #define HDCP_EVENT_EXIT (1 << 0x2)
87. /* HDCP user space status */
88. #define HDCP_US_NO_ERR (0 << 8)
89. #define HDCP_US_FAILURE (1 << 8)
91. #ifdef __KERNEL__
93. #include <linux/mutex.h>
94. #include <linux/workqueue.h>
95. #include <linux/init.h>
96. #include <linux/kernel.h>
97. #include <linux/io.h>
98. #include <linux/slab.h>
99. #include <linux/fs.h>
101. #define _9032_AUTO_RI_ /* Auto Ri mode */
102. #define _9032_BCAP_ /* BCAP polling */
103. #undef _9032_AN_STOP_FIX_
105. /***************************/
106. /* HW specific definitions */
107. /***************************/
109. /* DESHDCP base address */
110. /*----------------------*/
112. #define DSS_SS_FROM_L3__DESHDCP 0x58007000
114. /* DESHDCP registers */
115. #define DESHDCP__DHDCP_CTRL 0x020
116. #define DESHDCP__DHDCP_DATA_L 0x024
117. #define DESHDCP__DHDCP_DATA_H 0x028
119. /* DESHDCP CTRL bits */
120. #define DESHDCP__DHDCP_CTRL__DIRECTION_POS_F 2
121. #define DESHDCP__DHDCP_CTRL__DIRECTION_POS_L 2
123. #define DESHDCP__DHDCP_CTRL__OUTPUT_READY_POS_F 0
124. #define DESHDCP__DHDCP_CTRL__OUTPUT_READY_POS_L 0
126. /* HDMI WP base address */
127. /*----------------------*/
128. #define HDMI_WP 0x58006000
130. /* HDMI CORE SYSTEM base address */
131. /*-------------------------------*/
133. #define HDMI_IP_CORE_SYSTEM 0x400
135. /* HDMI CORE registers */
136. #define HDMI_IP_CORE_SYSTEM__DCTL 0x034
138. #define HDMI_IP_CORE_SYSTEM__HDCP_CTRL 0x03C
140. #define HDMI_IP_CORE_SYSTEM__BKSV0 0x040
142. #define HDMI_IP_CORE_SYSTEM__AN0 0x054
144. #define HDMI_IP_CORE_SYSTEM__AKSV0 0x074
146. #define HDMI_IP_CORE_SYSTEM__R1 0x088
147. #define HDMI_IP_CORE_SYSTEM__R2 0x08C
149. #define HDMI_IP_CORE_SYSTEM__RI_CMD 0x09C
150. #define HDMI_IP_CORE_SYSTEM__RI_STAT 0x098
152. #define HDMI_IP_CORE_SYSTEM__INTR2 0x1C8
153. #define HDMI_IP_CORE_SYSTEM__INTR3 0x1CC
155. #define HDMI_IP_CORE_SYSTEM__INT_UNMASK2 0x1D8
156. #define HDMI_IP_CORE_SYSTEM__INT_UNMASK3 0x1DC
158. #define HDMI_IP_CORE_SYSTEM__SHA_CTRL 0x330
160. #define HDMI_IP_CORE_SYSTEM__INTR2__BCAP 0x80
161. #define HDMI_IP_CORE_SYSTEM__INTR3__RI_ERR 0xF0
163. enum hdcp_repeater {
164. HDCP_RECEIVER = 0,
165. HDCP_REPEATER = 1
166. };
168. enum encryption_state {
169. HDCP_ENC_OFF = 0x0,
170. HDCP_ENC_ON = 0x1
171. };
173. /* HDMI CORE AV base address */
174. /*---------------------------*/
176. #define HDMI_CORE_AV_BASE 0x900
177. #ifndef HDMI_CORE_AV_HDMI_CTRL
178. #define HDMI_CORE_AV_HDMI_CTRL 0x0BC
179. #define HDMI_CORE_AV_PB_CTRL2 0x0FC
180. #define HDMI_CORE_AV_CP_BYTE1 0x37C
181. #endif
183. #define HDMI_CORE_AV_HDMI_CTRL__HDMI_MODE 0x01
185. enum av_mute {
186. AV_MUTE_SET = 0x01,
187. AV_MUTE_CLEAR = 0x10
188. };
190. /***************************/
191. /* Definitions */
192. /***************************/
194. /* Status / error codes */
195. #define HDCP_OK 0
196. #define HDCP_DDC_ERROR 1
197. #define HDCP_AUTH_FAILURE 2
198. #define HDCP_AKSV_ERROR 3
199. #define HDCP_3DES_ERROR 4
200. #define HDCP_SHA1_ERROR 5
201. #define HDCP_DRIVER_ERROR 6
202. #define HDCP_CANCELLED_AUTH 7
204. #define HDCP_INFINITE_REAUTH 0x100
205. #define HDCP_MAX_FAIL_MESSAGES 3
207. /* FIXME: should be 300ms delay between HDMI start frame event and HDCP enable
208. * (to respect 7 VSYNC delay in 24 Hz)
209. */
210. #define HDCP_ENABLE_DELAY 300
211. #define HDCP_R0_DELAY 110
212. #define HDCP_KSV_TIMEOUT_DELAY 5000
213. #define HDCP_REAUTH_DELAY 1000
215. /* Event source */
216. #define HDCP_SRC_SHIFT 8
217. #define HDCP_IOCTL_SRC (0x1 << HDCP_SRC_SHIFT)
218. #define HDCP_HDMI_SRC (0x2 << HDCP_SRC_SHIFT)
219. #define HDCP_IRQ_SRC (0x4 << HDCP_SRC_SHIFT)
220. #define HDCP_WORKQUEUE_SRC (0x8 << HDCP_SRC_SHIFT)
222. /* Workqueue events */
223. /* Note: HDCP_ENABLE_CTL, HDCP_R0_EXP_EVENT, HDCP_KSV_TIMEOUT_EVENT and
224. * HDCP_AUTH_REATT_EVENT can be cancelled by HDCP disabling
225. */
226. #define HDCP_ENABLE_CTL (HDCP_IOCTL_SRC | 0)
227. #define HDCP_DISABLE_CTL (HDCP_IOCTL_SRC | 1)
228. #define HDCP_START_FRAME_EVENT (HDCP_HDMI_SRC | 2)
229. #define HDCP_STOP_FRAME_EVENT (HDCP_HDMI_SRC | 3)
230. #define HDCP_HPD_LOW_EVENT (HDCP_IRQ_SRC | 4)
231. #define HDCP_RI_FAIL_EVENT (HDCP_IRQ_SRC | 5)
232. #define HDCP_KSV_LIST_RDY_EVENT (HDCP_IRQ_SRC | 6)
233. #define HDCP_R0_EXP_EVENT (HDCP_WORKQUEUE_SRC | 7)
234. #define HDCP_KSV_TIMEOUT_EVENT (HDCP_WORKQUEUE_SRC | 8)
235. #define HDCP_AUTH_REATT_EVENT (HDCP_WORKQUEUE_SRC | 9)
237. /* IRQ status */
238. #define HDCP_IRQ_RI_FAIL 0x01
239. #define HDCP_IRQ_KSV_RDY 0x02
241. enum hdcp_states {
242. HDCP_DISABLED,
243. HDCP_ENABLE_PENDING,
244. HDCP_AUTHENTICATION_START,
245. HDCP_WAIT_R0_DELAY,
246. HDCP_WAIT_KSV_LIST,
247. HDCP_LINK_INTEGRITY_CHECK,
248. HDCP_KEY_ENCRYPTION_ONGOING
249. };
251. enum hdmi_states {
252. HDMI_STOPPED,
253. HDMI_STARTED
254. };
256. struct hdcp_delayed_work {
257. struct delayed_work work;
258. int event;
259. };
261. struct hdcp {
262. void __iomem *hdmi_wp_base_addr;
263. void __iomem *deshdcp_base_addr;
264. struct mutex lock;
265. struct hdcp_enable_control *en_ctrl;
266. dev_t dev_id;
267. struct class *hdcp_class;
268. enum hdmi_states hdmi_state;
269. enum hdcp_states hdcp_state;
270. int auth_state;
271. struct delayed_work *pending_start;
272. /* Following variable should store works submitted from workqueue
273. * context
274. * WARNING: only ONE work at a time can be stored (no conflict
275. * should happen). It is used to allow cancelled pending works when
276. * disabling HDCP
277. */
278. struct delayed_work *pending_wq_event;
279. int retry_cnt;
280. int fail_cnt;
281. int av_mute_needed;
282. int print_messages;
283. int dss_state;
284. int hdmi_restart;
285. int hpd_low;
286. spinlock_t spinlock;
287. struct workqueue_struct *workqueue;
288. int hdcp_up_event;
289. int hdcp_down_event;
290. bool hdcp_keys_loaded;
291. };
293. extern struct hdcp hdcp;
294. extern struct hdcp_sha_in sha_input;
297. /***************************/
298. /* Macros for accessing HW */
299. /***************************/
301. #define WR_REG_32(base, offset, val) __raw_writel(val, base + offset)
302. #define RD_REG_32(base, offset) __raw_readl(base + offset)
305. #undef FLD_MASK
306. #define FLD_MASK(start, end) (((1 << (start - end + 1)) - 1) << (end))
307. #undef FLD_VAL
308. #define FLD_VAL(val, start, end) (((val) << end) & FLD_MASK(start, end))
309. #define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
310. #define FLD_MOD(orig, val, start, end) \
311. (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
313. #define WR_FIELD_32(base, offset, start, end, val) \
314. WR_REG_32(base, offset, FLD_MOD(RD_REG_32(base, offset), val, \
315. start, end))
317. #define RD_FIELD_32(base, offset, start, end) \
318. ((RD_REG_32(base, offset) & FLD_MASK(start, end)) >> (end))
321. #undef DBG
323. #ifdef HDCP_DEBUG
324. #define DBG(format, ...) \
325. printk(KERN_DEBUG "HDCP: " format "\n", ## __VA_ARGS__)
326. #else
327. #define DBG(format, ...)
328. #endif
330. /***************************/
331. /* Function prototypes */
332. /***************************/
334. int hdcp_user_space_task(int flags);
336. /* 3DES */
337. int hdcp_3des_load_key(uint32_t *deshdcp_encrypted_key);
338. void hdcp_3des_encrypt_key(struct hdcp_encrypt_control *enc_ctrl,
339. uint32_t out_key[DESHDCP_KEY_SIZE]);
341. /* IP control */
342. int hdcp_lib_disable(void);
343. int hdcp_lib_step1_start(void);
344. int hdcp_lib_step1_r0_check(void);
345. int hdcp_lib_step2(void);
346. int hdcp_lib_irq(void);
347. void hdcp_lib_auto_ri_check(bool state);
348. void hdcp_lib_auto_bcaps_rdy_check(bool state);
349. void hdcp_lib_set_av_mute(enum av_mute av_mute_state);
350. void hdcp_lib_set_encryption(enum encryption_state enc_state);
351. u8 hdcp_lib_check_repeater_bit_in_tx(void);
353. #endif /* __KERNEL__ */
355. #endif /* _HDCP_H_ */