Ready For Nanoimprint?

Nanoimprint has been discussed, debated, and hyped since the term was first introduced in 1996. Now, a full 20 years later, it is being taken much more seriously in light of increasing photomask costs and delays in bringing alternatives to market.
纳米压印这个术语自 1996 年首次推出以来就一直被讨论、争论和炒作。现在，整整 20 年过去了，鉴于光掩模成本的增加以及替代品推向市场的延迟，人们更加认真地对待它。

Nanoimprint lithography is something like a room-temperature UV cure embossing process. The structures are patterned onto a template or mold using an e-beam or scanner, and then pressed into a resist on a substrate. After that, the template is removed. In semiconductor lithography, this is a relatively simple process by comparison, which is why it has attracted so much attention.
纳米压印光刻类似于室温紫外线固化压花工艺。使用电子束或扫描仪将结构图案化到模板或模具上，然后压入基板上的抗蚀剂中。之后，模板被移除。相比之下，在半导体光刻中，这是一个相对简单的工艺，这就是它引起如此多关注的原因。

Resolution has been well documented for this technology. But other key metrics—throughput, overlay and defect density—are still unproven. And that has set off a flurry of activity around nanoimprint, notably from Canon and Toshiba.
该技术的分辨率已有详细记录。但其他关键指标——吞吐量、覆盖率和缺陷密度——仍未得到证实。这引发了围绕纳米压印的一系列活动，尤其是佳能和东芝。

Canon’s imprint process is very different from conventional lithography. It starts with a pattern that is formed by ink-jetting drops of a UV-curable resist. A mold with the desired pattern is lowered into the liquid, which fills the mold. The resist is cured by a flash of UV light, and the mold is then separated from the pattern.
佳能的压印工艺与传统的平版印刷工艺有很大不同。它首先通过喷墨 UV 固化抗蚀剂滴形成图案。将具有所需图案的模具放入液体中，液体充满模具。通过紫外线闪光固化抗蚀剂，然后将模具与图案分离。

The process was invented at the University of Texas and was refined by the venture-funded startup Molecular Imprints. Canon acquired Molecular imprints in 2014. The challenges for imprint were obvious from the start. Could the liquid spread quickly? Could the patterns be overlaid to within single nanometers? Could the mechanical molding process be clean enough to yield devices? And could the 1x molds be made defect-free?
该工艺由德克萨斯大学发明，并由风险投资初创公司 Molecular Imprints 进行改进。佳能于 2014 年收购了 Molecular imprints。imprint 面临的挑战从一开始就显而易见。液体会很快扩散吗？这些图案可以重叠到一个纳米以内吗？机械成型工艺是否足够清洁以生产设备？ 1x 模具能否做到无缺陷？

So where are we with throughput?
那么我们的吞吐量在哪里？

“We have developed a cluster tool system with four imprint heads and four stages,” said Kazunori Iwamoto, deputy group executive at Canon, in an interview last month at the Advanced Lithography Symposium. “The throughput has improved from [40 x300 mm is that 300mm wafers] wafers per hour in 2014 to 60 wafers per hour in 2016. What’s more, this platform will achieve more than 80 wafers per hour in 2017.
“我们开发了一个具有四个压印头和四个平台的集群工具系统，”佳能集团副主管 Kazunori Iwamoto 上个月在高级光刻研讨会上接受采访时说道。 “产能从2014年的每小时[40 x300毫米即300毫米晶圆]提升至2016年的每小时60片晶圆。更重要的是，该平台将在2017年实现每小时超过80片晶圆。

Iwamoto explained the throughput improvement comes from faster filling times of the imprint resist into the mold. To reduce the filling time, a faster spread of the imprint liquid is required.
Iwamoto 解释说，产量的提高来自于压印抗蚀剂填充到模具中的时间更快。为了减少填充时间，需要更快地扩散压印液体。

Two techniques were described in this conference. One is the combination of a smaller drop volume (1 picoliter) and high drop density. This reduces the air bubbles during filling. The other was the development of a new imprint resist with faster spread and filling times. The throughput, imprint uniformity and defect density are also improved by design for imprint, or DFI.
本次会议描述了两种技术。一种是较小的液滴体积（1 皮升）和高液滴密度的组合。这减少了填充过程中的气泡。另一个是开发一种具有更快铺展和填充时间的新型压印抗蚀剂。压印设计（DFI）也提高了吞吐量、压印均匀性和缺陷密度。

“We do have some simple layout design rules,” explained Mark Melliar-Smith, CEO of Canon Nanotechnology (formerly Molecular Imprints). “The spread of the imprint liquid is sensitive to pattern density, so we require the use of dummy features in large, unpatterned areas much like CMP. We also require the top surface to be flat to similar tolerance for DOF (depth of focus) for 193 litho.”
“我们确实有一些简单的布局设计规则，”佳能纳米技术公司（前身为分子印记公司）首席执行官 Mark Melliar-Smith 解释道。 “压印液体的扩散对图案密度很敏感，因此我们需要在大的无图案区域中使用虚拟特征，就像 CMP 一样。我们还要求顶部表面平坦，以达到 193 光刻 DOF（焦深）的相似公差。”

Melliar-Smith emphasized that there were no additional constraints on scribe lines. “Our customers would not tolerate any changes.”
梅利亚尔-史密斯强调，对划线没有额外的限制。 “我们的客户不会容忍任何改变。”

A separate element to design for imprint is drop-pattern management. “We have developed software to design the drop pattern to match the fill of the pattern, eliminate the trapping of air bubbles, and speeding up the spreading step,” Melliar-Smith said.
压印设计的一个单独元素是滴图案管理。 “我们开发了软件来设计液滴图案，以匹配图案的填充，消除气泡的滞留，并加快扩散步骤，”梅利亚尔-史密斯说。

That will be critical for improving wafer throughput. Iwamoto said that the long-term goal of 200 wafers per hour will require larger imprint fields.
这对于提高晶圆产量至关重要。 Iwamoto 表示，每小时 200 片晶圆的长期目标将需要更大的压印区域。

Overlay 覆盖
One piece that is critical to this whole process is overlay, which is the ability of a lithography scanner to align and print the various layers accurately on top of each other.
对整个过程至关重要的一个部分是覆盖，这是光刻扫描仪能够准确地将各个层对齐并打印在彼此之上的能力。

“Current mix and match overlay (MMO) is at 4.8nm 3 sigma, and the goal for next year is 4nm which will meet production targets for NAND and DRAM,” said Iwamoto. “In 2018 MMO will improve further to less than 3.5nm.”
Iwamoto 表示：“目前的混合搭配叠加 (MMO) 工艺为 4.8nm 3 sigma，明年的目标是 4nm，这将满足 NAND 和 DRAM 的生产目标。” “2018年MMO将进一步改进至3.5nm以下。”

He noted that the current MMO error includes a large wafer distortion error coming from the prior lithographic levels. Reduction of that error is key to MMO improvement. Canon has developed something called High Order Correction (HOC), and also a new wafer chuck for imprint. The HOC correction system uses a second light source that can be modulated using a digital mirror device. The light locally heats the wafer and mask, and because of the difference in expansion thermal coefficient, local wafer distortion corrections can be made.
他指出，当前的 MMO 误差包括来自先前光刻水平的较大晶圆畸变误差。减少该错误是 MMO 改进的关键。佳能开发了一种称为高阶校正（HOC）的技术，以及一种用于压印的新型晶圆卡盘。 HOC 校正系统使用可使用数字镜装置进行调制的第二光源。光对晶圆和掩模进行局部加热，由于膨胀热系数的差异，可以进行局部晶圆畸变校正。

He showed data that HOC reduced wafer distortion errors in a single field from 2.5 nm to 0.67nm. “In addition, we developed a new wafer chuck to improve the flatness around the wafer edge by using special tooling, to help us to meet production overlay specification.”
他展示了 HOC 的数据，将单个视场中的晶圆畸变误差从 2.5 nm 降低到 0.67 nm。 “此外，我们开发了一种新的晶圆卡盘，通过使用特殊工具来提高晶圆边缘周围的平整度，以帮助我们满足生产覆盖规范。”

Defects 缺陷
There are three defects that Canon is concerned with—mask, in process random, and in process adders often expressed as mask life.”
佳能关注三个缺陷：掩模、过程中随机以及通常表示为掩模寿命的过程中加法器。”

The company has demonstrated five defects cm² for a 2xnm half pitch pattern, using masks made by DNP. The goal for engineering release is 1 percm², and production release 0.1 per cm².
该公司使用 DNP 制造的掩模，展示了 2xnm 半节距图案的五个 cm2 缺陷。工程释放的目标是每平方厘米 1 个，生产释放的目标是每平方厘米 0.1 个。

In a presentation Toshiba showed lower values of 1 defect cm². MS suggested that the lower value measured by Toshiba was probably a reflection of the production environment at Toshiba. The causes of these defects were ion contamination and trapped surface bubbles, and they are working on mitigation. Toshiba also showed a 4 wafer run with no added repeating defects, a critical capability.
在一次演示中，东芝展示了 1 cm² 的较低缺陷值。 MS 认为东芝测得的较低值可能反映了东芝的生产环境。这些缺陷的原因是离子污染和截留的表面气泡，他们正在努力缓解。东芝还展示了不添加重复缺陷的 4 晶圆运行，这是一项关键能力。

In a presentation, DNP presented data on 2x nm masks and mask copies.
在一次演示中，DNP 展示了 2x nm 掩模和掩模副本的数据。
They have made 2x nm patterns with a 1-2 defects per mask by using the current mask replication tool. An audience member asked “are you ready for production?”
他们使用当前的掩模复制工具制作了 2x nm 图案，每个掩模有 1-2 个缺陷。有观众问“准备好拍摄了吗？”
Answer “yes”.  回答“是”。

DNP also showed data for 1x nm parts with 10 defects per mask. There was a discussion of this problem caused by trying to separate 2 stiff mask blanks.
DNP 还显示了每个掩模有 10 个缺陷的 1x nm 零件的数据。由于尝试分离 2 个硬质掩模坯料而引起了对这个问题的讨论。

“I have complete confidence that the 1xnm will be as good as 2x nm very quickly. We understand the problem and DNP is making rapid progress,” said Melliar-Smith.
“我完全有信心 1xnm 很快就会与 2xnm 一样好。我们了解这个问题，并且 DNP 正在取得快速进展。”Melliar-Smith 说道。

Iwamoto emphasized that Canon is just now developing a new mask replication tool to support a mass production towards 1xnm.
岩本强调，佳能目前正在开发一种新的掩模复制工具，以支持1xnm的大规模生产。

Finally, Iwamoto showed results for airborne particle adders as an indicator for mask life. Canon has applied its materials expertise to treat equipment surfaces and has developed an air curtain around the imprint head to protect the wafer. “The results suggest a mask life in excess of 1,000 wafers, the production goal,” said Melliar-Smith
最后，岩本展示了空气中颗粒添加物的结果作为面罩寿命的指标。佳能应用其材料专业知识来处理设备表面，并在压印头周围开发了气幕以保护晶圆。 “结果表明掩模寿命超过 1,000 片晶圆，这是生产目标，”Melliar-Smith 说道

There are two early adopters of the technology, Toshiba and Hynix. Canon says that is enough to reach critical mass for high-volume manufacturing. “We have to start small and grow,” Melliar-Smith said. “Today, we probably do not have the bandwidth for many more customers. If we can continue to show progress, other customers will be interested, and if we can get defects down another 100X, we can even use this for logic.”
该技术有两家早期采用者：东芝和海力士。佳能表示，这足以达到大批量生产的临界质量。 “我们必须从小规模做起，然后不断成长，”梅利亚尔-史密斯说。 “今天，我们可能没有足够的带宽来满足更多的客户。如果我们能够继续展示进步，其他客户就会感兴趣，如果我们能够将缺陷再减少 100 倍，我们甚至可以将其用于逻辑。”

EUV also is making progress, but probably only has 1 generation before it has to add multi-patterning or much larger NA. “We think imprint has a long term future with resolution below 10nm, no shot noise, minimal layout constraints, and the potential of increasing throughput from larger fields that are not possible with optics,” he said.
EUV 也在取得进展，但可能只有第一代，就必须添加多重图案或更大的 NA。他说：“我们认为压印技术拥有长期的未来，其分辨率低于 10 纳米，无散粒噪声，最小的布局限制，并且具有通过光学器件无法实现的更大领域增加吞吐量的潜力。”

Long time in development 开发时间较长
Tatsuhiko Higashiki, of Toshiba’s Research and Development Center, began the imprint program inside of Toshiba a decade ago.
东芝研发中心的 Tatsuhiko Higashiki 十年前在东芝内部开始了印记计划。

“Ten years ago, I was approached by my colleagues, to help them find a way to pattern 30nm pitch and below, which was beyond immersion at that time, and multi patterning and EUVL had not been developed,” said Higashiki. “I was researching high-resolution lithography such like interferometric lithography for the whole 300mm wafer area. However, the technology can expose only dense patterns. Suddenly Molecular Imprints visited me and I saw a way to create small test structures using a relatively inexpensive tool, so we started with an Imprio 200 system. At the time I did not imagine that imprint could be used as a high volume manufacturing tool.”
“十年前，我的同事找到我，帮助他们找到一种对 30 纳米及以下节距进行图案化的方法，这在当时是无法进行沉浸式处理的，而且多重图案化和 EUVL 尚未开发出来，”Higashiki 说道。 “我正在研究高分辨率光刻，例如整个 300mm 晶圆区域的干涉光刻。然而，该技术只能曝光密集的图案。突然，Molecular Imprints 拜访了我，我看到了一种使用相对便宜的工具创建小型测试结构的方法，因此我们从 Imprio 200 系统开始。当时我并没有想到压印可以用作大批量制造工具。”

By February 2011, there were papers at the SPIE Advanced Lithography conference by Toshiba reporting on their results using a MII system. MII reported on shipping an imprint module that was being integrated by their equipment partner. Canon reported on their evaluation of their MII system.
到 2011 年 2 月，东芝在 SPIE 高级光刻会议上发表了论文，报告了他们使用 MII 系统的结果。 MII 报告称，其设备合作伙伴正在发货一个压印模块。佳能报告了他们对其 MII 系统的评估。

In February 2014, it was announced that Canon was acquiring the semiconductor operations of Molecular Imprints. And in February 2015, Toshiba signed a definitive agreement with SK Hynix on joint development of next-generation lithography, targeting practical use in 2017.
2014年2月，佳能宣布收购Molecular Imprints的半导体业务。 2015 年 2 月，东芝与 SK 海力士签署了联合开发下一代光刻技术的最终协议，目标是在 2017 年投入实际使用。

“Last year, Toshiba presented in SPIE2015 that we tried a working memory device, with the critical layer patterned using a Canon imprint ADT (advanced development technology) tool. “I have confidence to imprint as a future patterning solution,” said Higashiki. “Today we have 50 companies in the supply chain engaged in imprint. We have added several imprint ADT tools on a Canon platform with an MII Imprint head. “
“去年，东芝在 SPIE2015 上展示了我们尝试的一种工作存储设备，其关键层使用佳能压印 ADT（高级开发技术）工具进行图案化。 “我有信心将压印作为未来的图案解决方案，”Higashiki 说。 “如今，我们供应链中有 50 家公司从事印记业务。我们在带有 MII Imprint 头的 Canon 平台上添加了多个压印 ADT 工具。 “

Toshiba talked about the growth in the ecosystem, which today includes Shibaura (mask etcher), NuFlare (EB writer and mask inspection), as well as Canon, TEL, Zeon, TOK, Fuji Film and JSR.
东芝谈到了生态系统的发展，目前包括 Shibaura（掩模蚀刻机）、NuFlare（EB 写入器和掩模检查）以及 Canon、TEL、Zeon、TOK、Fuji Film 和 JSR。

But there is more work ahead, Higashiki noted. “To run production in memory, today’s defect density of 5 cm² must come down by 5X. This is still 100X higher than the level needed for logic. The higher defect tolerance is a direct result of error correction software that runs on memory. Overlay will be at 2 to 3 nm which will be good enough for memory.”
但东木指出，未来还有更多工作要做。 “为了进行内存生产，目前 5 cm² 的缺陷密度必须降低 5 倍。这仍然比逻辑所需的水平高 100 倍。更高的缺陷容忍度是在内存上运行的纠错软件的直接结果。覆盖层厚度为 2 至 3 nm，这对于内存来说已经足够了。”

The template also requires much work as it remains very demanding for resolution, distortion and defects. This requires access to a very specialized set of process equipment to be successful.
该模板还需要大量工作，因为它对分辨率、失真和缺陷的要求仍然非常高。这需要使用一套非常专业的工艺设备才能成功。