High Voltage Latch-Up Proof,
Quad SPST Switches
ADG5412/ADG5413
FEATURES FUNCTIONAL BLOCK DIAGRAMS
Latch-up proof
S1 S1
8 kV human body model (HBM) ESD rating
IN1 IN1
Low on resistance (<10 Ω)
D1 D1
±9 V to ±22 V dual-supply operation
S2 S2
9 V to 40 V single-supply operation
IN2 IN2
48 V supply maximum ratings
D2 D2
Fully specified at ±15 V, ±20 V, +12 V, and +36 V ADG5412 ADG5413
S3 S3
V to V analog signal range
SS DD
IN3 IN3
D3 D3
APPLICATIONS
S4 S4
Relay replacement
IN4 IN4
Automatic test equipment
D4 D4
Data acquisition
Instrumentation
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Avionics
Figure 1.
Audio and video switching
Communication systems
exhibits break-before-make switching action for use in
GENERAL DESCRIPTION
multiplexer applications.
The ADG5412/ADG5413 contain four independent single-
pole/single-throw (SPST) switches. The ADG5412 switches PRODUCT HIGHLIGHTS
turn on with Logic 1. The ADG5413 has two switches with
1. Trench isolation guards against latch-up. A dielectric trench
digital control logic similar to that of the ADG5412; however,
separates the P and N channel transistors thereby preventing
the logic is inverted on the other two switches. Each switch
latch-up even under severe overvoltage conditions.
conducts equally well in both directions when on, and each
2. Low R .
ON
switch has an input signal range that extends to the supplies.
3. Dual-supply operation. For applications where the analog
In the off condition, signal levels up to the supplies are blocked.
signal is bipolar, the ADG5412/ADG5413 can be operated
The ADG5412 and ADG5413 do not have a VL pin. The digital from dual supplies up to ±22 V.
inputs are compatible with 3 V logic inputs over the full 4. Single-supply operation. For applications where the analog
operating supply range. signal is unipolar, the ADG5412/ADG5413 can be operated
from a single rail power supply up to 40 V.
The on-resistance profile is very flat over the full analog input
5. 3 V logic compatible digital inputs: V = 2.0 V, V = 0.8 V.
INH INL
range, which ensures good linearity and low distortion when
6. No V logic power supply required.
L
switching audio signals. High switching speed also makes the
devices suitable for video signal switching. The ADG5413
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
rights of third parties that may result from its use. Specifications subject to change without notice. No
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license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Fax: 781.461.3113 ?2010–2011 Analog Devices, Inc. All rights reserved.
Trademarks and registered trademarks are the property of their respective owners.
09202-001ADG5412/ADG5413
TABLE OF CONTENTS
Features .............................................................................................. 1 Continuous Current per Channel, Sx or Dx..............................7
Applications....................................................................................... 1 Absolute Maximum Ratings ............................................................8
Functional Block Diagrams............................................................. 1 ESD Caution...................................................................................8
General Description ......................................................................... 1 Pin Configurations and Function Descriptions ............................9
Product Highlights ........................................................................... 1 Typical Performance Characteristics ........................................... 10
Revision History ............................................................................... 2 Test Circuits..................................................................................... 14
Specifications..................................................................................... 3 Terminology.................................................................................... 16
±15 V Dual Supply ....................................................................... 3 Trench Isolation.............................................................................. 17
±20 V Dual Supply ....................................................................... 4 Applications Information .............................................................. 18
12 V Single Supply........................................................................ 5 Outline Dimensions ....................................................................... 19
36 V Single Supply........................................................................ 6 Ordering Guide .......................................................................... 19
REVISION HISTORY
6/11—Rev. 0 to Rev. A
Change to ISS Parameter in Table 2................................................. 4
7/10—Revision 0: Initial Version
Rev. A | Page 2 of 20 ADG5412/ADG5413
SPECIFICATIONS
±15 V DUAL SUPPLY
V = +15 V ± 10%, V = ?15 V ± 10%, GND = 0 V, unless otherwise noted.
DD SS
Table 1.
Parameter 25°C ?40°C to +85°C ?40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VDD to VSS V
On Resistance, R 9.8 Ω typ V = ±10 V, I = ?10 mA;
ON S S
see Figure 24
11 14 16 Ω max VDD = +13.5 V, VSS = ?13.5 V
On-Resistance Match Between Channels, 0.35 Ω typ VS = ±10 V, IS = ?10 mA
?R ON
0.7 0.9 1.1 Ω max
On-Resistance Flatness, R 1.2 Ω typ V = ±10 V, I = ?10 mA
FLAT (ON) S S
1.6 2 2.2 Ω max
LEAKAGE CURRENTS V = +16.5 V, V = ?16.5 V
DD SS
Source Off Leakage, I (Off) ±0.05 nA typ V = ±10 V, V = m 10 V;
S S D
see Figure 27
±0.25 ±0.75 ±3.5 nA max
Drain Off Leakage, ID (Off) ±0.05 nA typ V = ±10 V, V = m 10 V;
S D
see Figure 27
±0.25 ±0.75 ±3.5 nA max
Channel On Leakage, ID (On), IS (On) ±0.1 nA typ VS = VD = ±10 V; see Figure 23
±0.4 ±2 ±12 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current, I or I 0.002 μA typ V = V or V
INL INH IN GND DD
±0.1 μA max
Digital Input Capacitance, C 2.5 pF typ
IN
1
DYNAMIC CHARACTERISTICS
t 170 ns typ R = 300 Ω, C = 35 pF
ON L L
202 236 262 ns max VS = 10 V; see Figure 31
tOFF 120 ns typ RL = 300 Ω, CL = 35 pF
145 170 182 ns max VS = 10 V; see Figure 31
Break-Before-Make Time Delay, t 15 ns typ R = 300 Ω, C = 35 pF
D L L
(ADG5413 Only)
6 ns min V = V = 10 V; see Figure 30
S1 S2
Charge Injection, QINJ 240 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF;
see Figure 32
Off Isolation ?78 dB typ R = 50 Ω, C = 5 pF, f = 1 MHz;
L L
see Figure 26
Channel-to-Channel Crosstalk ?70 dB typ R = 50 Ω, C = 5 pF, f = 1 MHz;
L L
see Figure 25
Total Harmonic Distortion + Noise 0.009 % typ RL = 1 kΩ, 15 V p-p, f = 20 Hz
to 20 kHz; see Figure 28
?3 dB Bandwidth 167 MHz typ R = 50 Ω, C = 5 pF; see
L L
Figure 29
Insertion Loss ?0.7 dB typ R = 50 Ω, C = 5 pF, f = 1 MHz;
L L
see Figure 29
CS (Off) 18 pF typ VS = 0 V, f = 1 MHz
CD (Off) 18 pF typ VS = 0 V, f = 1 MHz
C (On), C (On) 60 pF typ V = 0 V, f = 1 MHz
D S S
Rev. A | Page 3 of 20 ADG5412/ADG5413
Parameter 25°C ?40°C to +85°C ?40°C to +125°C Unit Test Conditions/Comments
POWER REQUIREMENTS VDD = +16.5 V, VSS = ?16.5 V
IDD 45 μA typ Digital inputs = 0 V or VDD
55 70 μA max
I 0.001 μA typ Digital inputs = 0 V or V
SS DD
1 μA max
V /V ±9/±22 V min/V max GND = 0 V
DD SS
1
Guaranteed by design; not subject to production test.
±20 V DUAL SUPPLY
VDD = +20 V ± 10%, VSS = ?20 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2.
Parameter 25°C ?40°C to +85°C ?40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VDD to VSS V
On Resistance, RON 9 Ω typ VS = ±15 V, IS = ?10 mA;
see Figure 24
10 13 15 Ω max V = +18 V, V = ?18 V
DD SS
On-Resistance Match Between 0.35 Ω typ V = ±15 V, I = ?10 mA
S S
Channels, ?R ON
0.7 0.9 1.1 Ω max
On-Resistance Flatness, RFLAT (ON) 1.5 Ω typ VS = ±15 V, IS = ?10 mA
1.8 2.2 2.5 Ω max
LEAKAGE CURRENTS VDD = +22 V, VSS = ?22 V
Source Off Leakage, IS (Off) ±0.05 nA typ V = ±15 V, V = m 15 V;
S D
see Figure 27
±0.25 ±0.75 ±3.5 nA max
Drain Off Leakage, ID (Off) ±0.05 nA typ VS = ±15 V, VD = m 15 V;
see Figure 27
±0.25 ±0.75 ±3.5 nA max
Channel On Leakage, I (On), I (On) ±0.1 nA typ V = V = ±15 V; see
D S S D
Figure 23
±0.4 ±2 ±12 nA max
DIGITAL INPUTS
Input High Voltage, V 2.0 V min
INH
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.002 μA typ VIN = VGND or VDD
±0.1 μA max
Digital Input Capacitance, C 2.5 pF typ
IN
1
DYNAMIC CHARACTERISTICS
tON 158 ns typ RL = 300 Ω, CL = 35 pF
187 217 240 ns max V = 10 V; see Figure 31
S
t 110 ns typ R = 300 Ω, C = 35 pF
OFF L L
138 154 170 ns max V = 10 V; see Figure 31
S
Break-Before-Make Time Delay, tD 12 ns typ RL = 300 Ω, CL = 35 pF
(ADG5413 Only)
5 ns min V = V = 10 V; see
S1 S2
Figure 30
Charge Injection, Q 310 pC typ V = 0 V, R = 0 Ω, C = 1 nF;
INJ S S L
see Figure 32
Off Isolation ?78 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see
Figure 26
Channel-to-Channel Crosstalk ?70 dB typ R = 50 Ω, C = 5 pF, f = 1 MHz;
L L
see Figure 25
Rev. A | Page 4 of 20 ADG5412/ADG5413
Parameter 25°C ?40°C to +85°C ?40°C to +125°C Unit Test Conditions/Comments
Total Harmonic Distortion + Noise 0.007 % typ RL = 1 kΩ, 20 V p-p, f = 20 Hz to
20 kHz; see Figure 28
?3 dB Bandwidth 160 MHz typ RL = 50 Ω, CL = 5 pF;
see Figure 29
Insertion Loss ?0.6 dB typ R = 50 Ω, C = 5 pF, f = 1 MHz;
L L
see Figure 29
CS (Off) 17 pF typ VS = 0 V, f = 1 MHz
CD (Off) 17 pF typ VS = 0 V, f = 1 MHz
C (On), C (On) 60 pF typ V = 0 V, f = 1 MHz
D S S
POWER REQUIREMENTS VDD = +22 V, VSS = ?22 V
IDD 50 μA typ Digital inputs = 0 V or VDD
70 110 μA max
I 0.001 μA typ Digital inputs = 0 V or V
SS DD
1 μA max
VDD/VSS ±9/±22 V min/V max GND = 0 V
1
Guaranteed by design; not subject to production test.
12 V SINGLE SUPPLY
V = 12 V ± 10%, V = 0 V, GND = 0 V, unless otherwise noted.
DD SS
Table 3.
Parameter 25°C ?40°C to +85°C ?40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V V
DD
On Resistance, R 19 Ω typ V = 0 V to 10 V, I = ?10 mA;
ON S S
see Figure 24
22 27 31 Ω max VDD = 10.8 V, VSS = 0 V
On-Resistance Match Between Channels, 0.4 Ω typ VS = 0 V to 10 V, IS = ?10 mA
?R
ON
0.8 1 1.2 Ω max
On-Resistance Flatness, R 4.4 Ω typ V = 0 V to 10 V, I = ?10 mA
FLAT (ON) S S
5.5 6.5 7.5 Ω max
LEAKAGE CURRENTS V = 13.2 V, V = 0 V
DD SS
Source Off Leakage, I (Off) ±0.05 nA typ = 1 V/10 V, V = 10 V/1 V;
S VS D
see Figure 27
±0.25 ±0.75 ±3.5 nA max
Drain Off Leakage, ID (Off) ±0.05 nA typ V = 1 V/10 V, V = 10 V/1 V;
S D
see Figure 27
±0.25 ±0.75 ±3.5 nA max
Channel On Leakage, ID (On), IS (On) ±0.1 nA typ VS = VD = 1 V/10 V; see
Figure 23
±0.4 ±2 ±12 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current, I or I 0.002 μA typ V = V or V
INL INH IN GND DD
±0.1 μA max
Digital Input Capacitance, C 2.5 pF typ
IN
1
DYNAMIC CHARACTERISTICS
t 225 ns typ R = 300 Ω, C = 35 pF
ON L L
296 358 403 ns max VS = 8 V; see Figure 31
tOFF 150 ns typ RL = 300 Ω, CL = 35 pF
187 222 247 ns max VS = 8 V; see Figure 31
Rev. A | Page 5 of 20 ADG5412/ADG5413
Parameter 25°C ?40°C to +85°C ?40°C to +125°C Unit Test Conditions/Comments
Break-Before-Make Time Delay, tD 70 ns typ RL = 300 Ω, CL = 35 pF
(ADG5413 Only)
38 ns min VS1 = VS2 = 8 V; see Figure 30
Charge Injection, Q 95 pC typ V = 6 V, R = 0 Ω, C = 1 nF;
INJ S S L
see Figure 32
Off Isolation ?78 dB typ
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 26
Channel-to-Channel Crosstalk ?70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 25
Total Harmonic Distortion + Noise 0.07 % typ R = 1 kΩ, 6 V p-p, f = 20 Hz
L
to 20 kHz; see Figure 28
?3 dB Bandwidth 180 MHz typ RL = 50 Ω, CL = 5 pF; see
Figure 29
Insertion Loss ?1.3 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 29
C (Off) 22 pF typ V = 6 V, f = 1 MHz
S S
C (Off) 22 pF typ V = 6 V, f = 1 MHz
D S
CD (On), CS (On) 58 pF typ VS = 6 V, f = 1 MHz
POWER REQUIREMENTS V = 13.2 V
DD
IDD 40 μA typ Digital inputs = 0 V or VDD
65 μA max
VDD 9/40 V min/V max GND = 0 V, VSS = 0 V
1
Guaranteed by design; not subject to production test.
36 V SINGLE SUPPLY
V = 36 V ± 10%, V = 0 V, GND = 0 V, unless otherwise noted.
DD SS
Table 4.
Parameter 25°C ?40°C to +85°C ?40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V V
DD
On Resistance, R 10.6 Ω typ V = 0 V to 30 V, I = ?10 mA;
ON S S
see Figure 24
12 15 17 Ω max VDD = 32.4 V, VSS = 0 V
On-Resistance Match Between Channels, 0.35 Ω typ VS = 0 V to 30 V, IS = ?10 mA
?R
ON
0.7 0.9 1.1 Ω max
On-Resistance Flatness, R 2.7 Ω typ V = 0 V to 30 V, I = ?10 mA
FLAT(ON) S S
3.2 3.8 4.5 Ω max
LEAKAGE CURRENTS V = 39.6 V, V = 0 V
DD SS
Source Off Leakage, I (Off) ±0.05 nA typ V = 1 V/30 V, V = 30 V/1 V;
S S D
see Figure 27
±0.25 ±0.75 ±3.5 nA max
Drain Off Leakage, ID (Off) ±0.05 nA typ VS = 1 V/30 V, VD = 30 V/1 V;
see Figure 27
±0.25 ±0.75 ±3.5 nA max
Channel On Leakage, ID (On), IS (On) ±0.1 nA typ VS = VD = 1 V/30 V; see
Figure 23
±0.4 ±2 ±12 nA max
Rev. A | Page 6 of 20 ADG5412/ADG5413
Parameter 25°C ?40°C to +85°C ?40°C to +125°C Unit Test Conditions/Comments
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current, I or I 0.002 μA typ V = V or V
INL INH IN GND DD
±0.1 μA max
Digital Input Capacitance, C 2.5 pF typ
IN
1
DYNAMIC CHARACTERISTICS
t 180 ns typ R = 300 Ω, C = 35 pF
ON L L
220 230 248 ns max VS = 18 V; see Figure 31
tOFF 130 ns typ RL = 300 Ω, CL = 35 pF
169 167 174 ns max VS = 18 V; see Figure 31
Break-Before-Make Time Delay, t 25 ns typ R = 300 Ω, C = 35 pF
D L L
(ADG5413 Only)
8 ns min V = V = 18 V; see Figure 30
S1 S2
Charge Injection, QINJ 280 pC typ VS = 18 V, RS = 0 Ω, CL = 1 nF;
see Figure 32
Off Isolation ?78 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 26
Channel-to-Channel Crosstalk ?70 dB typ R = 50 Ω, C = 5 pF, f = 1 MHz;
L L
Figure 25
Total Harmonic Distortion + Noise 0.03 % typ RL = 1 kΩ, 18 V p-p, f = 20 Hz
to 20 kHz; see Figure 28
?3 dB Bandwidth 174 MHz typ R = 50 Ω, C = 5 pF; see
L L
Figure 29
Insertion Loss ?0.8 dB typ R = 50 Ω, C = 5 pF, f = 1 MHz;
L L
see Figure 29
CS (Off) 18 pF typ VS = 18 V, f = 1 MHz
CD (Off) 18 pF typ VS = 18 V, f = 1 MHz
C (On), C (On) 58 pF typ V = 18 V, f = 1 MHz
D S S
POWER REQUIREMENTS VDD = 39.6 V
IDD 80 μA typ Digital inputs = 0 V or VDD
100 130 μA max
V 9/40 V min/V max GND = 0 V, V = 0 V
DD SS
1
Guaranteed by design; not subject to production test.
CONTINUOUS CURRENT PER CHANNEL, Sx OR Dx
Table 5.
Parameter 25°C 85°C 125°C Unit
CONTINUOUS CURRENT, Sx OR Dx
V = +15 V, V = ?15 V
DD SS
TSSOP (θ = 112.6°C/W) 89 59 37 mA maximum
JA
LFCSP (θJA = 30.4°C/W) 160 94 49 mA maximum
VDD = +20 V, VSS = ?20 V
TSSOP (θ = 112.6°C/W) 95 63 39 mA maximum
JA
LFCSP (θ = 30.4°C/W) 170 98 50 mA maximum
JA
V = 12 V, V = 0 V
DD SS
TSSOP (θJA = 112.6°C/W) 61 43 29 mA maximum
LFCSP (θJA = 30.4°C/W) 110 70 42 mA maximum
VDD = 36 V, VSS = 0 V
TSSOP (θ = 112.6°C/W) 80 54 35 mA maximum
JA
LFCSP (θ = 30.4°C/W) 144 87 47 mA maximum
JA
Rev. A | Page 7 of 20 ADG5412/ADG5413
ABSOLUTE MAXIMUM RATINGS
T = 25°C, unless otherwise noted.
A
Table 6. Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
Parameter Rating
rating only; functional operation of the device at these or any
V to V 48 V
DD SS
other conditions above those indicated in the operational
V to GND ?0.3 V to +48 V
DD
section of this specification is not implied. Exposure to absolute
VSS to GND +0.3 V to ?48 V
1
maximum rating conditions for extended periods may affect
Analog Inputs VSS ? 0.3 V to VDD + 0.3 V or
30 mA, whichever occurs first device reliability.
1
Digital Inputs V ? 0.3 V to V + 0.3 V or
SS DD
Only one absolute maximum rating can be applied at any
30 mA, whichever occurs first
one time.
Peak Current, Sx or Dx Pins 278 mA (pulsed at 1 ms, 10%
duty cycle maximum)
ESD CAUTION
2
Continuous Current, Sx or Dx Data + 15%
Temperature Range
Operating ?40°C to +125°C
Storage ?65°C to +150°C
Junction Temperature 150°C
Thermal Impedance, θJA
16-Lead TSSOP (4-Layer 112.6°C/W
Board)
16-Lead LFCSP (4-Layer 30.4°C/W
Board)
Reflow Soldering Peak 260(+0/?5)°C
Temperature, Pb Free
1
Overvoltages at the INx, Sx, and Dx pins are clamped by internal diodes.
Limit current to the maximum ratings given.
2
See Table 5.
Rev. A | Page 8 of 20 ADG5412/ADG5413
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
IN1 1 16 IN2
D1 2 15 D2
S1 3 14 S2 PIN 1
ADG5412/ INDICATOR
S1 1 12 S2
V 4 13 V
SS ADG5413 DD
ADG5412/ 11 V
V 2
SS DD
GND 5 TOP VIEW 12 NC
ADG5413
GND 3 10 NC
(Not to Scale)
S4 6 11 S3 TOP VIEW
S4 4
9S3
(Not to Scale)
D4 7 10 D3
IN4 8 9 IN3
NC = NO CONNECT
NOTES
1. EXPOSED PAD TIED TO SUBSTRATE, V .
SS
2. NC = NO CONNECT.
Figure 3. LFCSP Pin Configuration
Figure 2. TSSOP Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
TSSOP LFCSP Mnemonic Description
1 15 IN1 Logic Control Input 1.
2 16 D1 Drain Terminal 1. This pin can be an input or output.
3 1 S1 Source Terminal 1. This pin can be an input or output.
4 2 VSS Most Negative Power Supply Potential.
5 3 GND Ground (0 V) Reference.
6 4 S4 Source Terminal 4. This pin can be an input or output.
7 5 D4 Drain Terminal 4. This pin can be an input or output.
8 6 IN4 Logic Control Input 4.
9 7 IN3 Logic Control Input 3.
10 8 D3 Drain Terminal 3. This pin can be an input or output.
11 9 S3 Source Terminal 3. This pin can be an input or output.
12 10 NC No Connection.
13 11 V Most Positive Power Supply Potential.
DD
14 12 S2 Source Terminal 2. This pin can be an input or output.
15 13 D2 Drain Terminal 2. This pin can be an input or output.
16 14 IN2 Logic Control Input 2.
EP Exposed Pad The exposed pad is connected internally. For increased reliability of the solder joints
and maximum thermal capability, it is recommended that the pad be soldered to the
substrate, V .
SS
Table 8. ADG5412 Truth Table
INx Switch Condition
1 On
0 Off
Table 9. ADG5413 Truth Table
INx S1, S4 S2, S3
0 Off On
1 On Off
Rev. A | Page 9 of 20
09202-002
09202-003
D4 5 16 D1
15 IN1
IN4 6
IN3 7 14 IN2
13 D2
D3 8ADG5412/ADG5413
TYPICAL PERFORMANCE CHARACTERISTICS
16 12
T = 25°C V = +10V
T = 25°C
A DD A
V = +9V V = –10V
DD
SS
14 V = –9V
SS
V = 32.4V
DD
10
V = 0V
SS
V = 36V
DD
V = +11V
DD
12
V = 0V
SS
V = –11V
SS
8
10
8 6
V = 39.6V
DD
V 10 = +13.5V
DD
V = 0V
SS
V = –13.5V
SS
V = +16.5V
V = +15V DD
6
DD
V = –16.5V
V = –15V SS
4
SS
4
2
2
0 0
–20 –15 –10 –5 0 5 10 15 20 0 5 10 15 20 25 30 35 40 45
V , V (V) V , V (V)
S D S D
Figure 4. RON as a Function of VS, VD (Dual Supply) Figure 7. R as a Function of V , V (Single Supply)
ON S D
12
18
V = +18V
16
DD
V = –18V
SS
10
14
T = +125°C
A
8 12
V = +22V
T = +85°C
DD A
V = +20V V = –22V
DD
SS 10
V = –20V
SS
6
T = +25°C
A
8
T = –40°C
A
4 6
4
2
2
V = +15V
DD
T = 25°C
V = –15V
A SS
0 0
–25 –20 –15 –10 –5 0 5 10 15 20 25
–15 –10 –5 0 5 10 15
V , V (V)
S D V , V (V)
S D
Figure 5. RON as a Function of VS, VD (Dual Supply) Figure 8. RON as a Function of VS (VD) for Different Temperatures,
±15 V Dual Supply
16
25
T = 25°C
A V = +10V
DD
V = 0V
SS V = 10.8V
DD
14
V = 0V
SS
V = +9V
DD
20
V = 0V
SS
12
T = +125°C
A
10
15 T = +85°C
A
8
T = +25°C
A
V = 11V
DD
V = 0V
SS
10
V = 12V
6
DD T = –40°C
A
V = 13.2V
V = 0V DD
SS
V = 0V
SS
4
5
2
V = +20V
DD
V = –20V
SS
0 0
–20 –15 –10 –5 0 5 10 15 20
02468101214
V , V (V) V , V (V)
S D S D
Figure 6. R as a Function of V , V (Single Supply) Figure 9. R as a Function of V (V ) for Different Temperatures,
ON S D ON S D
±20 V Dual Supply
Rev. A | Page 10 of 20
ON RESISTANCE ( ?)
ON RESISTANCE ( ?)
ON RESISTANCE ( ?)
09202-032
09202-035 09202-034
ON RESISTANCE ( ?) ON RESISTANCE ( ?)
ON RESISTANCE ( ?)
09202-040 09202-033
09202-041 ADG5412/ADG5413
30
0.8
V = 12V V = +20V
DD DD
V = 0V V = –20V
SS SS
V = +15V/–15V I , I (ON) + +
BIAS D S
0.6
25
I , I (ON) – –
D S
T = +125°C
A 0.4
20
I (OFF) + –
S
= +85°C
T
A
0.2
I (OFF) – +
D
15
T = +25°C
A
0
T = –40°C
A
10
–0.2
I (OFF) – +
S
5
–0.4
I (OFF) + –
D
0
–0.6
024681012
0 25 50 75 100 125
V , V (V)
TEMPERATURE (°C)
S D
Figure 10. R as a Function of V (V ) for Different Temperatures, Figure 13. Leakage Currents vs. Temperature, ±20 V Dual Supply
ON S D
12 V Single Supply
16 0.6
V = 12V
DD
V = 0V
SS
I , I (ON) + +
D S
14 V = 1V/10V
BIAS
12 0.4
T = +125°C
A
T = +85°C
I , I (ON) – –
10 A
D S
I (OFF) + –
S
T = +25°C
8 0.2
A
I (OFF) – +
D
T = –40°C
6 A
4 0
2
I (OFF) + –
D
V = 36V
DD
V = 0V I (OFF) – +
SS
S
0 –0.2
0 5 10 15 20 25 30 35 40 0255075100125
V , V (V)
TEMPERATURE (°C)
S D
Figure 11. RON as a Function of VS (VD) for Different Temperatures, Figure 14. Leakage Currents vs. Temperature, 12 V Single Supply
36 V Single Supply
0.8 0.8
V = +15V V = 36V
DD DD
V = –15V V = 0V
SS SS I , I (ON) + +
D S
V = +10V/–10V V = 1V/30V
BIAS BIAS
0.6
I , I (ON) + +
0.6 D S
I , I (ON) – –
D S
I , I (ON) – –
D S
0.4
0.4
I (OFF) – +
D
I (OFF) + –
S
0.2
0.2
0
I (OFF) + –
S
0
–0.2
I (OFF) – +
S
I (OFF) – +
D
–0.2
I (OFF) + –
–0.4
D
I (OFF) – +
S
I (OFF) + –
D
–0.6
–0.4
0 25 50 75 100 125
0255075100125
TEMPERATURE (°C) TEMPERATURE (°C)
Figure 12. Leakage Currents vs. Temperature, ±15 V Dual Supply Figure 15. Leakage Currents vs. Temperature, 36 V Single Supply
Rev. A | Page 11 of 20
LEAKAGE CURRENT (nA) ON RESISTANCE ( ?) ON RESISTANCE ( ?)
09202-043
09202-042
09202-037
LEAKAGE CURRENT (nA) LEAKAGE CURRENT (nA) LEAKAGE CURRENT (nA)
09202-036
09202-039 09202-038ADG5412/ADG5413
0
0
T = 25°C T = 25°C
A A
V = +15V
V = +15V
DD
–10 –10 DD
V = –15V
SS V = –15V
SS
–20
–20
–30 –30
NO DECOUPLING
CAPACITORS
–40 –40
–50
–50
–60 –60
DECOUPLING
–70
–70
CAPACITORS
–80
–80
–90 –90
–100
–100
1k 10k 100k 1M 10M 100M 1G
1k 10k 100k 1M 10M
FREQUENCY (Hz) FREQUENCY (Hz)
Figure 16. Off Isolation vs. Frequency, ±15 V Dual Supply Figure 19. ACPSRR vs. Frequency, ±15 V Dual Supply
0.10
0
LOAD = 1k ?
T = 25°C
A
T = 25°C
V = +15V
DD A
–10 0.09
V = –15V
SS
V = 12V, V = 0V, V = 6V p-p
DD SS S
0.08
–20
–30 0.07
–40 0.06
0.05
–50
–60 0.04
V = 36V, V = 0V, V = 18V p-p
DD SS S
–70 0.03
0.02
–80
V = 15V, V = 15V, V = 15V p-p
DD SS S
–90 0.01
V = 20V, V = 20V, V = 20V p-p
DD SS S
–100 0
0 5 10 15 20
10k 100k 1M 10M 100M 1G
FREQUENCY (Hz) FREQUENCY (MHz)
Figure 17. Crosstalk vs. Frequency, ±15 V Dual Supply Figure 20. THD + N vs. Frequency, ±15 V Dual Supply
500 0
T = 25°C
T = 25°C
A A
V = +15V
450 DD
–0.5
V = –15V
SS
400 –1.0
V = +20V
DD
V = –20V
SS
350
–1.5
300 –2.0
V = +36V
DD
V = 0V
SS
250 –2.5
200
–3.0
150 –3.5
V = +15V V = +12V
100
DD DD –4.0
V = –15V V = 0V
SS SS
50
–4.5
0 –5.0
–20 –10 0 10 20 30 40 1k 10k 100k 1M 10M 100M 1G
V (V)
FREQUENCY (Hz)
S
Figure 18. Charge Injection vs. Source Voltage
Figure 21. Bandwidth
Rev. A | Page 12 of 20
CHARGE INJECTION (pC) CROSSTALK (dB) OFF ISOLATION (dB)
09202-030
09202-028 09202-025
ACPSRR (dB)
INSERTION LOSS (dB) THD + N (%)
09202-027
09202-029
09202-026 ADG5412/ADG5413
350
300
t (12V)
ON
250
t (±20V)
ON
t (±15V)
200 t (±15V) OFF
ON
t (36V)
ON
150
100
t (12V)
OFF
t (36V)
t (±20V)
OFF OFF
50
0
–40 –20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 22. tON, tOFF Times vs. Temperature
Rev. A | Page 13 of 20
TIME (ns)
09202-031ADG5412/ADG5413
TEST CIRCUITS
I (OFF) I (OFF)
S D
Sx Dx
I (ON) A A
D
Sx Dx
A
V V V
S D
S V
D
Figure 23. On Leakage
Figure 27. Off Leakage
V V
DD SS
0.1μF 0.1μF
AUDIO PRECISION
V V
DD
SS
R
S
I
DS
Sx
INx V
S
V p-p
V1
Dx
V
OUT
V
IN R
L
Sx Dx
1k?
GND
V
S
R = V /I
ON 1 DS
Figure 24. On Resistance
Figure 28. THD + Noise
V
V
DD SS
V V
0.1μF 0.1μF
DD SS
0.1μF 0.1μF
NETWORK
ANALYZER
V V NETWORK
DD
SS
V ANALYZER
OUT V V
DD
SS
R S1
L
50?
Sx
50?
Dx
R
L
INx
50 ?
S2 V
S
Dx
V
V
S
OUT
V
GND IN R
L
50?
GND
V
OUT
V WITH SWITCH
CHANNEL-TO-CHANNEL CROSSTALK = 20 log OUT
V
S INSERTION LOSS = 20 log
V WITHOUT SWITCH
OUT
Figure 25. Channel-to-Channel Crosstalk Figure 29. Bandwidth
V V
DD SS
0.1μF 0.1μF
NETWORK
ANALYZER
V V
DD SS
Sx
50 ?
50?
INx
V
S
Dx
V
OUT
V
IN R
L
50?
GND
V
OUT
OFF ISOLATION = 20 log
V
S
Figure 26. Off Isolation
Rev. A | Page 14 of 20
09202-014
09202-016
09202-021
09202-020
09202-015
09202-023
09202-024 ADG5412/ADG5413
V V
DD
SS
0.1μF 0.1μF V
IN 50% 50%
0V
V V
90%
DD SS 90%
V
S1 D1 OUT1
V V
S1 0V
OUT1
C
R
L L
S2 D2
V 300 ? 35pF
V
S2 OUT2
R C
L
L
90%
90%
300 ? 35pF
V
OUT2
IN1,
0V
ADG5413
IN2
GND
t
t
D D
Figure 30. Break-Before-Make Time Delay, t
D
V V
DD
SS
0.1μF 0.1μF
ADG5412
V 50% 50%
IN
V V
DD SS
V
OUT
Sx
Dx
R C
L L
V
S
300 ? 35pF
INx
90% 90%
V
OUT
GND
t
t
ON OFF
Figure 31. Switching Times
V V
DD SS
V V
DD SS
V ADG5412
IN
V
R
S OUT
Sx Dx
ON OFF
C
L
V
S
1nF
IN
V
OUT
?V
OUT
Q = C × ?V
INJ L OUT
GND
Figure 32. Charge Injection
Rev. A | Page 15 of 20
09202-018
09202-019
09202-017ADG5412/ADG5413
TERMINOLOGY
IDD CIN
IDD represents the positive supply current. CIN is the digital input capacitance.
ISS tON
ISS represents the negative supply current. tON represents the delay between applying the digital control
input and the output switching on.
V , V
D S
V and V represent the analog voltage on Terminal D and t
D S OFF
Terminal S, respectively. t represents the delay between applying the digital control
OFF
input and the output switching off.
R
ON
RON represents the ohmic resistance between Terminal D and tD
Terminal S. tD represents the off time measured between the 80% point of
both switches when switching from one address state to
ΔRON
another.
ΔRON represents the difference between the RON of any two
channels. Off Isolation
Off isolation is a measure of unwanted signal coupling through
R
FLAT (ON)
an off switch.
Flatness that is defined as the difference between the maximum
and minimum value of on resistance measured over the specified Charge Injection
analog signal range is represented by RFLAT (ON). Charge injection is a measure of the glitch impulse transferred
from the digital input to the analog output during switching.
IS (Off)
IS (Off) is the source leakage current with the switch off. Crosstalk
Crosstalk is a measure of unwanted signal that is coupled
I (Off)
D
through from one channel to another as a result of parasitic
I (Off) is the drain leakage current with the switch off.
D
capacitance.
I (On), I (On)
D S
Bandwidth
I (On) and I (On) represent the channel leakage currents with
D S
Bandwidth is the frequency at which the output is attenuated
the switch on.
by 3 dB.
VINL
On Response
VINL is the maximum input voltage for Logic 0.
On response is the frequency response of the on switch.
VINH
Insertion Loss
V is the minimum input voltage for Logic 1.
INH
Insertion loss is the loss due to the on resistance of the switch.
I , I
INL INH
Total Harmonic Distortion + Noise (THD + N)
I and I represent the low and high input currents of the
INL INH
The ratio of the harmonic amplitude plus noise of the signal to
digital inputs.
the fundamental is represented by THD + N.
CD (Off)
AC Power Supply Rejection Ratio (ACPSRR)
CD (Off) represents the off switch drain capacitance, which is
ACPSRR is the ratio of the amplitude of signal on the output to the
measured with reference to ground.
amplitude of the modulation. This is a measure of the ability of
CS (Off)
the part to avoid coupling noise and spurious signals that appear
C (Off) represents the off switch source capacitance, which is
S
on the supply voltage pin to the output of the switch. The dc voltage
measured with reference to ground.
on the device is modulated by a sine wave of 0.62 V p-p.
C (On), C (On)
D S
CD (On) and CS (On) represent on switch capacitances, which
are measured with reference to ground.
Rev. A | Page 16 of 20 ADG5412/ADG5413
TRENCH ISOLATION
NMOS PMOS
In the ADG5412 and ADG5413, an insulating oxide layer
(trench) is placed between the NMOS and the PMOS transistors
of each CMOS switch. Parasitic junctions, which occur between
the transistors in junction isolated switches, are eliminated, and
the result is a completely latch-up proof switch.
In junction isolation, the N and P wells of the PMOS and NMOS
transistors form a diode that is reverse-biased under normal
P-WELL N-WELL
operation. However, during overvoltage conditions, this diode
can become forward-biased. A silicon controlled rectifier (SCR)
type circuit is formed by the two transistors causing a significant
amplification of the current that, in turn, leads to latch-up. With
TRENCH
trench isolation, this diode is removed, and the result is a latch-
BURIED OXIDE LAYER
up proof switch.
HANDLE WAFER
Figure 33. Trench Isolation
Rev. A | Page 17 of 20
09202-022ADG5412/ADG5413
APPLICATIONS INFORMATION
The ADG54xx family of switches and multiplexers provide a allow single-supply operation from 9 V to 40 V and dual-supply
robust solution for instrumentation, industrial, automotive, operation from ±9 V to ±22 V. The ADG5412/ADG5413 (as
aerospace, and other harsh environments that are prone to well as other select devices within the same family) achieve an
latch-up, which is an undesirable high current state that can 8 kV human body model ESD rating, which provides a robust
lead to device failure and persists until the power supply is solution eliminating the need for separate protect circuitry
turned off. The ADG5412/ADG5413 high voltage switches designs in some applications.
Rev. A | Page 18 of 20 ADG5412/ADG5413
OUTLINE DIMENSIONS
5.10
5.00
4.90
16 9
4.50
6.40
4.40
BSC
4.30
1 8
PIN 1
1.20
MAX
0.15
0.20
0.05
0.75
0.09
8°
0.60
0.30
0.65 0°
0.45
0.19
SEATING
BSC
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 34. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
4.10
0.35
4.00 SQ
0.30
3.90
PIN 1 0.25
INDICATOR
16
13
0.65
12
BSC
1
EXPOSED
2.70
PAD
2.60 SQ
2.50
4
9
5
8
0.45
0.20 MIN
TOP VIEW BOTTOM VIEW
0.40
0.35
0.80
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
0.75
0.05 MAX
THE PIN CONFIGURATION AND
0.70
FUNCTION DESCRIPTIONS
0.02 NOM
SECTION OF THIS DATA SHEET.
COPLANARITY
SEATING 0.08
PLANE
0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-220-WGGC.
Figure 35. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm × 4 mm Body, Very Very Thin Quad
(CP-16-17)
Dimensions shown in millimeters
ORDERING GUIDE
1
Model Temperature Range Package Description Package Option
ADG5412BRUZ ?40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG5412BRUZ-REEL7 ?40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG5412BCPZ-REEL7 ?40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-17
ADG5413BRUZ ?40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG5413BRUZ-REEL7 ?40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG5413BCPZ-REEL7 ?40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-17
1
Z = RoHS Compliant Part.
Rev. A | Page 19 of 20
PIN 1
INDICATOR
08-16-2010-CADG5412/ADG5413
NOTES
?2010–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09202-0-6/11(A)
Rev. A | Page 20 of 20 |
|
