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Cortex-A8 Technical Reference Manual Revision: r3p2

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3.2.25. c1, Control Register

The purpose of the Control Register is to provide control and configuration of:

• memory alignment, endianness, protection, and fault behavior

• MMU, cache enables, and cache replacement strategy

• interrupts and behavior of interrupt latency

• location for exception vectors

• program flow prediction.

The Control Register is:

• a 32-bit read/write register

• accessible in privileged modes only

• partially banked.

Figure 3.20 shows the bit arrangement of the Control Register.

Figure 3.20. Control Register bit assignments

Table 3.46 shows how the bit values correspond with the Control Register functions.