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CD4094 位移位存储总线寄存器: CD4094是带输出锁存和三态控制的串入/并出高速转换器，具有使用简单、功耗低、驱动能力强和控制灵活等优点。
CD4094的引脚定义如图1。其中(1)脚为锁存端，(2)脚为串行数据输入端，(3)脚为串行时钟端。(1)脚为高电平时，8位并行输出口Q1～Q8在时钟的上升沿随串行输入而变化；(1)脚为低电平时，输出锁定。利用锁存端可方便地进行片选和级联输出控制。(15)脚为并行输出状态控制端，(15)脚为低电平时，并行输出端处在高阻状态，在用CD4094作显示输出时，可使显示数码闪烁。(9)脚QS、(10)脚Q′S是串行数据输出端，用于级联。QS端在第9个串行时钟的上升沿开始输出，Q′S端在第9个串行时钟的下降沿开始输出。838电子
当CD4094电源为5V时，输出电流大于3．2MA，灌电流为1 MA。串行时钟频率可达2．5MHZ。838电子
CD4094引脚图
CD4094真值表：
| Clock |
Output Enable |
Strobe |
Data |
Parallel Outputs 并行输出 |
Serial Outputs 串行输出 |
| Q1 |
QN |
QS (Note 1) |
Q S |
| ↑ |
0 |
X |
X |
三态 |
三态 |
Q7 |
不变 |
| ↓ |
0 |
X |
X |
三态 |
三态 |
不变 |
Q7 |
| ↑ |
1 |
0 |
X |
不变 |
不变 |
Q7 |
不变 |
| ↑ |
1 |
1 |
0 |
0 |
QN-1 |
Q7 |
不变 |
| ↑ |
1 |
1 |
1 |
1 |
QN-1 |
Q7 |
不变 |
| ↓ |
1 |
1 |
1 |
不变 |
不变 |
不变 |
Q7 |
CD4094内部电路方框图
Absolute Maximum Ratings 绝对最大额定值：
| Supply Voltage电源电压(VDD) |
-0.5 to +18 VDC |
| Input Voltage输入电压 (VIN) 838电子 |
-0.5 to VDD +0.5 VDC |
| Storage Temperature Range储存温度范围 (TS) |
-65℃ to +150℃ |
| Power Dissipation功耗 (PD) |
| Dual-In-Line 普通双列封装 新艺图库 |
700 mW |
| Small Outline 小外形封装 |
500 mW |
| Lead Temperature 焊接温度(TL) |
| Soldering, 10 seconds)（焊接10秒） |
260℃ |
Recommended Operating Conditions 建议操作条件：
| DC Supply Voltage 直流供电电压 (VDD) |
+3.0 to +15 VDC |
| Input Voltage输入电压 (VIN) 838电子 |
0 to VDD VDC |
| Operating Temperature Range工作温度范围 (TA) |
-40℃ to +85℃ |
DC Electrical Characteristics 直流电气特性：
|
Symbol符号 |
Parameter参数 |
Conditions 条件 |
-40°C |
+25°C |
+85°C |
Units 单位 |
| 最小 |
最大 |
最小 |
典型 |
最大 |
最小 |
最大 |
|
IDD |
Quiescent Device Current静态电流 |
VDD = 5.0V |
|
20 |
|
|
20 |
|
150 |
μA |
|
VDD = 10V |
|
40 |
|
|
40 |
|
300 |
|
VDD = 15V |
|
80 |
|
|
80 |
|
600 |
|
VOL |
LOW Level Output Voltage 输出低电平电压 |
VDD=5.0V |
|IO|≤1.μA |
|
0.05 |
|
0 |
0.05 |
|
0.05 |
V |
|
VDD=10V |
|
0.05 |
|
0 |
0.05 |
|
0.05 |
|
VDD=15V |
|
0.05 |
|
0 |
0.05 |
|
0.05 |
|
VOH
|
HIGH Level Output Voltage 输出高电平电压 |
VDD=5.0V |
|IO|≤1μA |
4.95 |
|
4.95 |
5.0 |
|
4.95 |
|
V |
|
VDD=10V |
9.95 |
|
9.95 |
10.0 |
|
9.95 |
|
|
VDD=15V |
14.95 |
|
14.95 |
15.0 |
|
14.95 |
|
|
VIL |
LOW Level Input Voltage 输入低电平电压 |
VDD = 5.0V, VO = 0.5V or 4.5V |
|
1.5 |
|
|
1.5 |
|
1.5 |
V |
|
VDD = 10V, VO = 1.0V or 9.0V |
|
3.0 |
|
|
3.0 |
|
3.0 |
|
VDD = 15V, VO = 1.5V or 13.5V |
838电子 |
4.0 |
|
|
4.0 |
|
4.0 |
|
VIH |
HIGH Level Input Voltage 输入高电平电压 |
VDD = 5.0V, VO = 0.5V or 4.5V |
3.5 |
|
3.5 |
|
|
3.5 |
|
V |
|
VDD = 10V, VO = 1.0V or 9.0V |
7.0 |
|
7.0 |
|
|
7.0 |
|
|
VDD = 15V, VO = 1.5V or 13.5V |
11.0 |
|
11.0 |
|
|
11.0 |
|
|
IOL |
LOW Level Output Current 输出低电平电流 (Note 4) |
VDD=5.0V,VO=0.4V |
0.52 |
|
0.44 |
0.88 |
|
0.36 |
|
mA |
|
VDD=10V,VO=0.5V |
1.3 |
|
1.1 |
2.25 |
|
0.9 |
|
|
VDD=15V,VO=1.5V |
3.6 |
|
3.0 |
8.8 |
|
2.4 |
|
|
IOH |
HIGH Level Output Current 输出高电平电流 (Note 4) |
VDD=5.0V,VO =4.6V |
-0.52 |
|
-0.44 |
0.88 |
|
-0.36 |
|
mA |
|
VDD =10V,VO= 9.5V |
-1.3 |
|
-1.1 |
2.25 |
|
-0.9 |
|
|
VDD=15V,VO =13.5V |
-3.6 |
|
-3.0 |
8.8 |
|
-2.4 |
|
|
IIN |
Input Current 输入电流 |
VDD =15V,VIN =0V |
|
-0.3 |
|
|
-0.3 |
|
-1.0 |
μA |
|
VDD=15V,VIN =15V |
|
0.3 |
|
|
0.3 |
|
1.0 |
|
IOZ |
3-STATE Output Leakage Current 3态输出漏电流 |
VDD=15V,VIN=0V or 15V |
|
1 |
|
|
1 |
|
10 |
μA |
AC Electrical Characteristics 交流电气特性：
|
Symbol 符号 |
Parameter 参数 838电子 |
Conditions 条件 |
最小 |
典型 |
最大 |
Units 单位 |
| tPHL, tPLH |
Propagation Delay Clock to QS |
VDD = 5.0V |
|
300 |
600 |
ns |
| VDD = 10V |
|
125 |
250 |
| VDD = 15V |
|
95 |
190 |
| tPHL, tPLH |
Propagation Delay Clock to Q￠ S |
VDD = 5.0V |
|
230 |
460 |
ns |
| VDD = 10V |
|
110 |
220 |
| VDD = 15V |
|
75 |
150 |
ns |
| tPHL, tPLH |
Propagation Delay Clock to Parallel Out |
VDD = 5.0V |
|
420 |
840 |
ns |
| VDD = 10V |
|
195 |
390 |
| VDD = 15V |
|
135 |
270 |
| tPHL, tPLH |
Propagation Delay Strobe to Parallel Out |
VDD = 5.0V |
|
290 |
580 |
ns |
| VDD = 10V |
|
145 |
290 |
| VDD = 15V |
|
100 |
200 |
| tPHZ |
Propagation Delay HIGH Level to HIGH Impedance |
VDD = 5.0V |
|
140 |
280 |
ns |
| VDD = 10V |
|
75 |
150 |
| VDD = 15V |
|
55 |
110 |
| tPLZ |
Propagation Delay LOW Level to HIGH Impedance |
VDD = 5.0V |
|
140 |
280 |
ns |
| VDD = 10V |
|
75 |
150 |
| VDD = 15V |
|
55 |
110 |
| tPZH |
Propagation Delay HIGH Impedance to HIGH Level |
VDD = 5.0V |
|
140 |
280 |
ns |
| VDD = 10V |
|
75 |
150 |
| VDD = 15V |
|
55 |
110 |
| tPZL |
Propagation Delay HIGH Impedance to LOW Level |
VDD = 5.0V |
|
140 |
280 |
ns |
| VDD = 10V |
|
75 |
150 |
| VDD = 15V |
|
55 |
110 |
| tTHL, tTLH |
Transition Time过渡时间 |
VDD = 5.0V |
|
100 |
200 |
ns |
| VDD = 10V |
|
50 |
100 |
| VDD = 15V |
|
40 |
80 |
| tSU |
Set-Up Time Data to Clock 建立时间数据时钟 |
VDD = 5.0V |
80 |
40 |
|
ns |
| VDD = 10V |
40 |
20 |
|
| VDD = 15V |
20 |
10 |
|
| tr, tf |
Maximum Clock Rise and Fall Time最大时钟上升和下降时间 |
VDD = 5.0V |
1 |
|
|
ms |
| VDD = 10V |
1 |
|
|
| VDD = 15V |
1 |
|
|
| tPC |
Minimum Clock Pulse Width最小时钟脉冲宽度 |
VDD = 5.0V |
200 |
100 |
|
ns |
| VDD = 10V |
100 |
50 |
|
| VDD = 15V |
83 |
40 |
|
| tPS |
Minimum Strobe Pulse Width |
VDD = 5.0V |
200 |
100 |
|
ns |
| VDD = 10V |
80 |
40 |
|
| VDD = 15V |
70 |
35 |
|
| fmax |
Maximum Clock Frequency 最大时钟频率 |
VDD = 5.0V |
1.5 |
3.0 |
|
MHz |
| VDD = 10V |
3.0 |
6.0 |
|
| VDD = 15V |
4.0 |
8.0 |
|
| CIN |
Input Capacitance 输入电容 |
Any Input |
|
5.0 |
7.5 |
pF |
| |
| |
测试电路和3态时序图 |
时序图 |
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