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CD4020中文资料(引脚图,真值表及电气参数)
CD4020是14位二进制串行计数器。所有的计数器为主从触发器。计数器在时钟下降沿进行计数，CR为高电平时，对计数器进行清零。由于在时钟输入端使用斯密特触发器，对脉冲上升和下降时间无限制，所有输入和输出均经过缓冲。
CD4020引脚图:
CD4020引脚功能图
CD4020内部方框图:
CD4020内部方框图
CD4020电气参数:
Absolute Maximum Ratings 绝对最大额定值：
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Supply Voltage电源电压(VDD)
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-0.5V to +18V
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Input Voltage输入电压 (VIN)
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-0.5V to VDD +0.5V
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Storage Temperature Range储存温度范围 (TS)
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-65℃ to +150℃
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Package Dissipation (PD)
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Dual-In-Line 普通双列封装
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700 mW
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Small Outline 小外形封装
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500 mW
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Lead Temperature 焊接温度(TL)
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Soldering, 10 seconds)（焊接10秒）
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260℃
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Recommended Operating Conditions 建议操作条件：
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Supply Voltage电源电压(VDD)
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+3V to +15V
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Input Voltage输入电压 (VIN)
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0V to VDD
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Operating Temperature Range工作温度范围 (TA)
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-40℃ to +85℃
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DC Electrical Characteristics 直流电气特性：
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Symbol符号
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Parameter参数
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Conditions 测试条件
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-40°C
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+25°C
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+85°C
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Units 单位
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最小
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最大
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最小
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典型
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最大
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最小
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最大
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IDD
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Quiescent Device Current静态电流
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VDD=5V,VIN = VDD or VSS
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20
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20
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150
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μA
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VDD=10V,VIN = VDD or VSS
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40
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40
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300
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VDD=15V,VIN= VDD or VSS
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80
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80
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600
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VOL
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LOW Level Output Voltage 输出低电平电压
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VDD = 5V
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0.05
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0
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0.05
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0.05
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V
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VDD = 10V
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0.05
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0
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0.05
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0.05
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VDD = 15V
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0.05
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0
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0.05
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0.05
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VOH
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HIGH Level Output Voltage 输出高电平电压
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VDD = 5V
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4.95
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4.95
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5
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4.95
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V
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VDD = 10V
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9.95
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9.95
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10
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9.95
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VDD = 15V
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14.95
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14.95
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15
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14.95
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VIL
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LOW Level Input Voltage 输入低电平电压
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VDD=5V,VO=0.5V or 4.5V
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1.5
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2
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1.5
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1.5
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V
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VDD=10V,VO=1.0V or 9.0V
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3.0
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4
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3.0
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3.0
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VDD=15V,VO=1.5V or 13.5V
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4.0
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6
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4.0
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4.0
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VIH
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HIGH Level Input Voltage 输入高电平电压
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VDD=5V,VO=0.5V or 4.5V
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3.5
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3.5
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3
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3.5
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V
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VDD=10V,VO=1.0V or 9.0V
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7.0
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7.0
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6
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7.0
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VDD=15V,VO=1.5V or 13.5V
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11.0
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11.0
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9
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11.0
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IOL
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LOW Level Output Current 输出低电平电流 (Note 3)
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VDD = 5V, VO = 0.4V
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0.52
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0.44
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0.88
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0.36
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mA
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VDD = 10V, VO = 0.5V
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1.3
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1.1
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2.25
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0.9
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VDD = 15V, VO = 1.5V
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3.6
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3.0
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8.8
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2.4
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IOH
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HIGH Level Output Current 输出高电平电流 (Note 3)
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VDD = 5V, VO = 4.6V
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-0.52
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-0.44
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-0.88
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-0.36
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mA
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VDD = 10V, VO = 9.5V
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-1.3
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-1.1
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-2.25
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-0.9
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VDD = 15V, VO = 13.5V
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-3.6
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-3.0
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-8.8
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-2.4
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IIN
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Input Current 输入电流
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VDD = 15V, VIN = 0V
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-0.30
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-10-5
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-0.30
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-1.0
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μA
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VDD = 15V, VIN = 15V
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0.30
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10-5
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0.30
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1.0
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CD4020 AC Electrical Characteristics 交流电气特性：
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Symbol 符号
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Parameter 参数
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Conditions 条件
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最小
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典型
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最大
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Units 单位
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tPHL1, tPLH1
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Propagation Delay Time to Q1
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VDD = 5V
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250
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550
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ns
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VDD = 10V
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100
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210
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VDD = 15V
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75
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150
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tPHL, tPLH
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Interstage Propagation Delay Time
from Qn to Qn+1
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VDD = 5V
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150
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330
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ns
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VDD = 10V
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60
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125
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VDD = 15V
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45
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90
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tTHL, tTLH
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Transition Time过渡时间
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VDD = 5V
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100
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200
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ns
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VDD = 10V
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50
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100
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VDD = 15V
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40
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80
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tWL, tWH
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Minimum Clock Pulse Width最小时钟脉冲宽度
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VDD = 5V
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125
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335
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ns
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VDD = 10V
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50
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125
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VDD = 15V
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40
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100
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trCL, tfCL
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Maximum Clock Rise and Fall Time最大时钟上升和下降时间
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VDD = 5V
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No Limit
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ns
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VDD = 10V
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No Limit
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VDD = 15V
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No Limit
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fCL
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Maximum Clock Frequency 最大时钟频率
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VDD = 5V
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1.5
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4
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MHz
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VDD = 10V
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4
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10
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VDD = 15V
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5
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12
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tPHL(R)
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Reset Propagation Delay 重置传输时延
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VDD = 5V
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200
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450
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ns
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VDD = 10V
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100
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210
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VDD = 15V
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80
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170
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tWH(R)
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Minimum Reset Pulse Width 最小复位脉冲宽度
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VDD = 5V
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200
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450
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ns
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VDD = 10V
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100
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210
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VDD = 15V
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80
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170
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CIN
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Average Input Capacitance 平均输入电容
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Any Input
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5
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7.5
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pF
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CPD
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Power Dissipation Capacitance 功耗电容
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50
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pF
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