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 ZHAOHUI 2019-10-10

ISO26262 Part 11 – Blog Post 3: Dependent Failure Analysis (DFA)

by Linda Stein Jul 27, 2017

(This article is coming from the LinkedIn, the editor Linda Stein published it on July 27,2017,this sharing is just for technical sharing purpose only and shall not be used as the commical purpose)

In the final part of our ISO 26262 part 11 blog, we look at theadditional information added to support semiconductor manufacturers assessdependent failures in integrated circuits.
The DFA section of part 11 provides guidelines for theidentification and analysis of possible common cause and cascading failuresbetween given elements, the assessment of their risk of violating a safety goal(or derived safety requirements) and the definition of safety measures tomitigate such risk if necessary.  This is done to evaluate potentialsafety concept weaknesses and to provide evidence of the fulfilment ofrequirements concerning independence or freedom from interference identifiedduring coexistence of elements analysis.

As in keeping with other parts of the second edition of ISO26262, the definition of dependent failures initiators (DFI) has beensignificantly enhanced.  Using 7 categories of potential causes, typicaldependent failures are listed.
The process of analysing dependent failures is supported byworkflow indicated in Figure 1.  This workflow helps identify the mainactivities to understand the independence and freedom from interference whenassessing the architecture and safety mechanisms.

As in the case in discretecircuits, the identification of the DFI is a key activity in assessing the‘quality’ of architecture.  The checklists of typical dependent failureshelp steer teams in this activity,
but also as indicated in Figure 1 this process can be enhancedby crosschecking dependent failure mechanisms identified during quantitativeanalysis i.e. hardware metrics from part 5 of ISO 26262.

As is always the case in such activities, the end goal is toverify the effectiveness of any safety mechanism identified and implementedduring the process.  Techniques such as fault tree analysis, FMEA, faultinjection and design rules are listed.
The steps identified for DFA in part 11 are not only helpful forsemiconductor designers, they also provide very useful additional informationfor designers of discrete circuits.

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